From patchwork Fri Jul 20 12:34:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Holger Brunck X-Patchwork-Id: 172235 X-Patchwork-Delegate: prafulla@marvell.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E9D242C0092 for ; Fri, 20 Jul 2012 22:35:09 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BE3E128144; Fri, 20 Jul 2012 14:34:54 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pPHIkF2u4fAA; Fri, 20 Jul 2012 14:34:54 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D8A5428132; Fri, 20 Jul 2012 14:34:42 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 63C502810F for ; Fri, 20 Jul 2012 14:34:33 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7+bUj70sIbno for ; Fri, 20 Jul 2012 14:34:32 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-de.keymile.com (mail-de.keymile.com [195.8.104.1]) by theia.denx.de (Postfix) with SMTP id A0694280F6 for ; Fri, 20 Jul 2012 14:34:30 +0200 (CEST) Received: from mailrelay.de.keymile.net ([10.9.1.54]) by eSafe SMTP Relay 1342775137; Fri, 20 Jul 2012 14:34:30 +0200 Received: from pc005093.de.keymile.net.de.keymile.net (pc005093.de.keymile.net.de.keymile.net [172.30.2.67]) by mailrelay.de.keymile.net (8.12.2/8.12.2) with ESMTP id q6KCXSj9010069; Fri, 20 Jul 2012 14:33:29 +0200 (MEST) From: Holger Brunck To: u-boot@lists.denx.de Date: Fri, 20 Jul 2012 14:34:25 +0200 Message-Id: <1342787667-30073-2-git-send-email-holger.brunck@keymile.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1342787667-30073-1-git-send-email-holger.brunck@keymile.com> References: <1342787667-30073-1-git-send-email-holger.brunck@keymile.com> X-ESAFE-STATUS: [srvhellgate.de.keymile.net] Mail clean Cc: Marek Vasut , Valentin Longchamp , Holger Brunck , Gerlando Falauto Subject: [U-Boot] [PATCH v3 2/4] kirkwood: implement kw_sdram_bs_set() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Gerlando Falauto Some boards might be equipped with different SDRAM configurations. When that is the case, CPU CS Window Size Register (CS[0]n Size) should be set to the biggest value through board.cfg file; then its value can be fixed at runtime according to the detected SDRAM size. Therefore, implement kw_sdram_bs_set(). Signed-off-by: Gerlando Falauto Signed-off-by: Holger Brunck cc: Prafulla Wadaskar cc: Valentin Longchamp cc: Marek Vasut Acked-by: Prafulla Wadaskar --- changes for v3: - remove reviewed by, because there are some chages in - use c-struct instead of defines - make kw_sdram_bs_set static changes for v2: - added Reviewed-by: Marek Vasut arch/arm/cpu/arm926ejs/kirkwood/dram.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c b/arch/arm/cpu/arm926ejs/kirkwood/dram.c index 1c5faab..5e2f9d8 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c @@ -39,6 +39,11 @@ struct kw_sdram_addr_dec { struct kw_sdram_bank sdram_bank[4]; }; +#define KW_REG_CPUCS_WIN_ENABLE (1 << 0) +#define KW_REG_CPUCS_WIN_WR_PROTECT (1 << 1) +#define KW_REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2) +#define KW_REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24) + /* * kw_sdram_bar - reads SDRAM Base Address Register */ @@ -57,6 +62,25 @@ u32 kw_sdram_bar(enum memory_bank bank) } /* + * kw_sdram_bs_set - writes SDRAM Bank size + */ +static void kw_sdram_bs_set(enum memory_bank bank, u32 size) +{ + struct kw_sdram_addr_dec *base = + (struct kw_sdram_addr_dec *)KW_REGISTER(0x1500); + /* Read current register value */ + u32 reg = readl(&base->sdram_bank[bank].win_sz); + + /* Clear window size */ + reg &= ~KW_REG_CPUCS_WIN_SIZE(0xFF); + + /* Set new window size */ + reg |= KW_REG_CPUCS_WIN_SIZE((size - 1) >> 24); + + writel(reg, &base->sdram_bank[bank].win_sz); +} + +/* * kw_sdram_bs - reads SDRAM Bank size */ u32 kw_sdram_bs(enum memory_bank bank)