From patchwork Thu Jul 5 19:54:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Troy Kisky X-Patchwork-Id: 169251 X-Patchwork-Delegate: hs@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 83A672C007B for ; Fri, 6 Jul 2012 05:55:54 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 533A32813C; Thu, 5 Jul 2012 21:55:29 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BWC1C23zZP0l; Thu, 5 Jul 2012 21:55:29 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B89722813D; Thu, 5 Jul 2012 21:54:25 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 85D2128105 for ; Thu, 5 Jul 2012 21:54:16 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id hotkujHbhoyv for ; Thu, 5 Jul 2012 21:54:15 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pb0-f44.google.com (mail-pb0-f44.google.com [209.85.160.44]) by theia.denx.de (Postfix) with ESMTPS id 8026E28108 for ; Thu, 5 Jul 2012 21:54:08 +0200 (CEST) Received: by pbcwy7 with SMTP id wy7so12330807pbc.3 for ; Thu, 05 Jul 2012 12:54:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=ZIX1UZ9/s0NLn6Ls+7Q57uCn21AKYe7lqO0631hj3e4=; b=MsHItA+nkNOgn3aBAAwyhm35hlxCIqLDIt9i9ck67eXId6j797PEpkfQHgO2BZTcYS 8YEJ2HohKAiKE7mcvXRa9Uw4x17sEpx3SCRtoKFyVkJ5ocIpotJUnwdmP2Npea1sWWqt Uy+4Ls+JJ3t9j0S/bDEH/CrGGzCyGp+ZfxBuf1UUbGWPRwPlYJoo7psxF4kO6Dj2pu4Y pH9b6UF8rprW4XArCh3GCAcdNhBBi+p8kml52KeuWGrH4p5y+mhmmZ6Bhddv3qSN3RTg /m2DJHgBOQFDH5z2NQfKx+kCgeSflnIbUTQ2PeglP8ehpwFNzA4YhD2L1zX8WaQeY1aB t+ew== Received: by 10.68.197.198 with SMTP id iw6mr30096701pbc.36.1341518046459; Thu, 05 Jul 2012 12:54:06 -0700 (PDT) Received: from officeserver-2 ([70.96.116.236]) by mx.google.com with ESMTPS id of1sm20324119pbb.15.2012.07.05.12.54.02 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 05 Jul 2012 12:54:04 -0700 (PDT) Received: from tkisky by officeserver-2 with local (Exim 4.76) (envelope-from ) id 1Sms7r-0006qP-LI; Thu, 05 Jul 2012 12:54:07 -0700 From: Troy Kisky To: u-boot@lists.denx.de, Heiko Schocher , sbabic@denx.de Date: Thu, 5 Jul 2012 12:54:03 -0700 Message-Id: <1341518043-26191-25-git-send-email-troy.kisky@boundarydevices.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1341518043-26191-1-git-send-email-troy.kisky@boundarydevices.com> References: <1341518043-26191-1-git-send-email-troy.kisky@boundarydevices.com> X-Gm-Message-State: ALoCoQlOPV9H36MNgf/DPtG7pw0v2HAcLnN4At/GGwJQYPxpho6pKoeQKwtdpave7+84k7wNjooH Cc: r49496@freescale.com Subject: [U-Boot] [PATCH V2 25/25] mx6qsabrelite: add i2c multi-bus support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This includes bus recovery support. Signed-off-by: Troy Kisky --- v2: no change --- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 50 +++++++++++++++++++++++-- include/configs/mx6qsabrelite.h | 6 +-- 2 files changed, 48 insertions(+), 8 deletions(-) diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 74ce84c..29c6630 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -72,9 +73,48 @@ iomux_v3_cfg_t uart2_pads[] = { MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), }; -iomux_v3_cfg_t i2c3_pads[] = { - MX6Q_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), - MX6Q_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, SGTL5000 */ +struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC, + .gp = GPIO_NUMBER(3, 21) + }, + .sda = { + .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC, + .gp = GPIO_NUMBER(3, 28) + } +}; + +/* I2C2 Camera, MIPI */ +struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC, + .gp = GPIO_NUMBER(4, 12) + }, + .sda = { + .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC, + .gp = GPIO_NUMBER(4, 13) + } +}; + +/* I2C3, J15 - RGB connector */ +struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC, + .gp = GPIO_NUMBER(1, 5) + }, + .sda = { + .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC, + .gp = GPIO_NUMBER(7, 11) + } }; iomux_v3_cfg_t usdhc3_pads[] = { @@ -292,7 +332,9 @@ int board_init(void) #ifdef CONFIG_MXC_SPI setup_spi(); #endif - imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads)); + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); return 0; } diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index df2b735..c3c6be2 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -60,11 +60,9 @@ /* I2C Configs */ #define CONFIG_CMD_I2C -#define CONFIG_HARD_I2C +#define CONFIG_I2C_MULTI_BUS #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0xfe +#define CONFIG_SYS_I2C_SPEED 100000 /* MMC Configs */ #define CONFIG_FSL_ESDHC