From patchwork Wed Jun 13 13:33:18 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Holger Brunck X-Patchwork-Id: 164682 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C086EB6EEB for ; Wed, 13 Jun 2012 23:34:53 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6A4E028127; Wed, 13 Jun 2012 15:34:42 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fs0DQdabfumT; Wed, 13 Jun 2012 15:34:42 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B94BC28101; Wed, 13 Jun 2012 15:34:40 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 519F2280E2 for ; Wed, 13 Jun 2012 15:33:29 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id FY6vzuUoHFao for ; Wed, 13 Jun 2012 15:33:29 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-de.keymile.com (mail-de.keymile.com [195.8.104.1]) by theia.denx.de (Postfix) with SMTP id AA38C280E6 for ; Wed, 13 Jun 2012 15:33:26 +0200 (CEST) Received: from mailrelay.de.keymile.net ([10.9.1.54]) by eSafe SMTP Relay 1339578562; Wed, 13 Jun 2012 15:33:26 +0200 Received: from pc005093.de.keymile.net.de.keymile.net (pc005093.de.keymile.net.de.keymile.net [172.30.2.67]) by mailrelay.de.keymile.net (8.12.2/8.12.2) with ESMTP id q5DDWRja009091; Wed, 13 Jun 2012 15:32:30 +0200 (MEST) From: Holger Brunck To: u-boot@lists.denx.de Date: Wed, 13 Jun 2012 15:33:18 +0200 Message-Id: <1339594400-4848-13-git-send-email-holger.brunck@keymile.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1339594400-4848-1-git-send-email-holger.brunck@keymile.com> References: <1339594400-4848-1-git-send-email-holger.brunck@keymile.com> X-ESAFE-STATUS: [srvhellgate.de.keymile.net] Mail clean Cc: Valentin Longchamp , Holger Brunck Subject: [U-Boot] [PATCH v2 12/14] arm/km: support the 2 PCIe fpga resets X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Valentin Longchamp The PCIe FPGAs now have to support 2 resets: one for the non traffic affecting part (PCIe) and one for the traffic affecting part. When the FPGA is not reconfigured, we only reset the PCIe part. Signed-off-by: Valentin Longchamp cc: Holger Brunck cc: Prafulla Wadaskar --- changes for v2: - nothing board/keymile/km_arm/fpga_config.c | 13 +++++++++---- 1 files changed, 9 insertions(+), 4 deletions(-) diff --git a/board/keymile/km_arm/fpga_config.c b/board/keymile/km_arm/fpga_config.c index 8ac6393..fcc5fe6 100644 --- a/board/keymile/km_arm/fpga_config.c +++ b/board/keymile/km_arm/fpga_config.c @@ -99,7 +99,7 @@ static int boco_set_bits(u8 reg, u8 flags) #define FPGA_INIT_B 0x10 #define FPGA_DONE 0x20 -static int fpga_done() +static int fpga_done(void) { int ret = 0; u8 regval; @@ -206,25 +206,30 @@ int wait_for_fpga_config(void) } #define PRST1 0x4 -#define BRIDGE_RST 0x4 +#define PCIE_RST 0x10 +#define TRAFFIC_RST 0x04 int fpga_reset(void) { int ret = 0; + u8 resets; if (!check_boco2()) { /* we do not have BOCO2, this is not really used */ return 0; } - ret = boco_clear_bits(PRST1, BRIDGE_RST); + /* if we have skipped, we only want to reset the PCIe part */ + resets = skip ? PCIE_RST : PCIE_RST | TRAFFIC_RST; + + ret = boco_clear_bits(PRST1, resets); if (ret) return ret; /* small delay for the pulse */ udelay(10); - ret = boco_set_bits(PRST1, BRIDGE_RST); + ret = boco_set_bits(PRST1, resets); if (ret) return ret;