From patchwork Thu Jun 7 05:45:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 163470 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 7E1FCB6FA5 for ; Thu, 7 Jun 2012 15:45:47 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F193B2811A; Thu, 7 Jun 2012 07:45:43 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id us6fnfH76vpx; Thu, 7 Jun 2012 07:45:43 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5AD1F2810D; Thu, 7 Jun 2012 07:45:41 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 864C128112 for ; Thu, 7 Jun 2012 07:45:39 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OFQr2exmmeGJ for ; Thu, 7 Jun 2012 07:45:38 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from avon.wwwdotorg.org (avon.wwwdotorg.org [70.85.31.133]) by theia.denx.de (Postfix) with ESMTPS id 6A3E228109 for ; Thu, 7 Jun 2012 07:45:37 +0200 (CEST) Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id BFF1463F7; Wed, 6 Jun 2012 23:48:41 -0600 (MDT) Received: from dart.wifi.foxrun.wwwdotorg.org (unknown [192.168.62.30]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id 3E223E40FA; Wed, 6 Jun 2012 23:45:34 -0600 (MDT) From: Stephen Warren To: albert.u.boot@aribaud.net Date: Wed, 6 Jun 2012 23:45:24 -0600 Message-Id: <1339047925-29052-1-git-send-email-swarren@wwwdotorg.org> X-Mailer: git-send-email 1.7.9.5 X-NVConfidentiality: public X-Virus-Scanned: clamav-milter 0.96.5 at avon.wwwdotorg.org X-Virus-Status: Clean Cc: u-boot@lists.denx.de, linux-rpi-kernel@lists.infradead.org Subject: [U-Boot] [PATCH 1/2] ARM: add basic support for the Broadcom BCM2835 SoC X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This SoC is used in the Raspberry Pi, for example. Initial support is enough to boot to a serial console, and execute a minimal set of U-Boot commands. No drivers are implemented. For more details, see http://www.broadcom.com/products/BCM2835 or http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf. Signed-off-by: Stephen Warren --- arch/arm/cpu/arm1176/bcm2835/Makefile | 37 +++++++++++++++++ arch/arm/cpu/arm1176/bcm2835/config.mk | 19 +++++++++ arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S | 19 +++++++++ arch/arm/cpu/arm1176/bcm2835/reset.c | 27 +++++++++++++ arch/arm/cpu/arm1176/bcm2835/timer.c | 55 ++++++++++++++++++++++++++ arch/arm/include/asm/arch-bcm2835/timer.h | 37 +++++++++++++++++ 6 files changed, 194 insertions(+) create mode 100644 arch/arm/cpu/arm1176/bcm2835/Makefile create mode 100644 arch/arm/cpu/arm1176/bcm2835/config.mk create mode 100644 arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S create mode 100644 arch/arm/cpu/arm1176/bcm2835/reset.c create mode 100644 arch/arm/cpu/arm1176/bcm2835/timer.c create mode 100644 arch/arm/include/asm/arch-bcm2835/timer.h diff --git a/arch/arm/cpu/arm1176/bcm2835/Makefile b/arch/arm/cpu/arm1176/bcm2835/Makefile new file mode 100644 index 0000000..4ea6d6b --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/Makefile @@ -0,0 +1,37 @@ +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).o + +SOBJS := lowlevel_init.o +COBJS := reset.o timer.o + +SRCS := $(SOBJS:.o=.c) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/arm1176/bcm2835/config.mk b/arch/arm/cpu/arm1176/bcm2835/config.mk new file mode 100644 index 0000000..b87ce24 --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/config.mk @@ -0,0 +1,19 @@ +# +# (C) Copyright 2012 Stephen Warren +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# Don't attempt to override the target CPU/ABI options; +# the Raspberry Pi toolchain does the right thing by default. +PLATFORM_RELFLAGS := $(filter-out -msoft-float,$(PLATFORM_RELFLAGS)) +PLATFORM_CPPFLAGS := $(filter-out -march=armv5t,$(PLATFORM_CPPFLAGS)) diff --git a/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S b/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S new file mode 100644 index 0000000..c7b0843 --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S @@ -0,0 +1,19 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +.globl lowlevel_init +lowlevel_init: + mov pc, lr diff --git a/arch/arm/cpu/arm1176/bcm2835/reset.c b/arch/arm/cpu/arm1176/bcm2835/reset.c new file mode 100644 index 0000000..69c9577 --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/reset.c @@ -0,0 +1,27 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +void reset_cpu(ulong addr) +{ + /* + * We should probably use the WDT module here, but an unaligned + * access will do the trick for now. + */ + readl(1); +} diff --git a/arch/arm/cpu/arm1176/bcm2835/timer.c b/arch/arm/cpu/arm1176/bcm2835/timer.c new file mode 100644 index 0000000..d232d7e --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/timer.c @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +int timer_init(void) +{ + return 0; +} + +ulong get_timer(ulong base) +{ + struct bcm2835_timer_regs *regs = + (struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR; + + return readl(®s->clo) - base; +} + +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} + +void __udelay(unsigned long usec) +{ + ulong endtime; + signed long diff; + + endtime = get_timer(0) + usec; + + do { + ulong now = get_timer(0); + diff = endtime - now; + } while (diff >= 0); +} diff --git a/arch/arm/include/asm/arch-bcm2835/timer.h b/arch/arm/include/asm/arch-bcm2835/timer.h new file mode 100644 index 0000000..30c70e0 --- /dev/null +++ b/arch/arm/include/asm/arch-bcm2835/timer.h @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _BCM2835_TIMER_H +#define _BCM2835_TIMER_H + +#define BCM2835_TIMER_PHYSADDR 0x20003000 + +struct bcm2835_timer_regs { + u32 cs; + u32 clo; + u32 chi; + u32 c0; + u32 c1; + u32 c2; + u32 c3; +}; + +#define BCM2835_TIMER_CS_M3 (1 << 3) +#define BCM2835_TIMER_CS_M2 (1 << 2) +#define BCM2835_TIMER_CS_M1 (1 << 1) +#define BCM2835_TIMER_CS_M0 (1 << 0) + +#endif