From patchwork Fri Jun 1 14:30:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar Lad X-Patchwork-Id: 162576 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D6E48B6FA5 for ; Mon, 4 Jun 2012 03:44:56 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 26709280AA; Sun, 3 Jun 2012 19:44:32 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id mmurChE8n9hS; Sun, 3 Jun 2012 19:44:31 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 56F99280AB; Sun, 3 Jun 2012 19:44:02 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 668E92818B for ; Fri, 1 Jun 2012 16:33:10 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id D9cKaar-OOTk for ; Fri, 1 Jun 2012 16:33:09 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by theia.denx.de (Postfix) with ESMTPS id 8508F2818F for ; Fri, 1 Jun 2012 16:33:09 +0200 (CEST) Received: from dbdp20.itg.ti.com ([172.24.170.38]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id q51EX692024231 for ; Fri, 1 Jun 2012 09:33:07 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q51EX6Ot004437 for ; Fri, 1 Jun 2012 20:03:06 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Fri, 1 Jun 2012 20:03:06 +0530 Received: from psplinux051 (psplinux051.india.ti.com [172.24.162.244]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id q51EX5MU015363; Fri, 1 Jun 2012 20:03:05 +0530 (IST) Received: from x0144960 by psplinux051 with local (Exim 4.74) (envelope-from ) id 1SaSuX-0006D7-3t; Fri, 01 Jun 2012 20:03:05 +0530 From: Prabhakar Lad To: Date: Fri, 1 Jun 2012 20:00:49 +0530 Message-ID: <1338561049-23627-8-git-send-email-prabhakar.lad@ti.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1338561049-23627-1-git-send-email-prabhakar.lad@ti.com> References: <1338561049-23627-1-git-send-email-prabhakar.lad@ti.com> MIME-Version: 1.0 X-Mailman-Approved-At: Sun, 03 Jun 2012 19:43:52 +0200 Cc: Tom Rini , "Rajashekhara, Sudhakar" Subject: [U-Boot] [PATCH 7/7] da850/omap-l138: add support for direct NOR boot mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Lad, Prabhakar This patch adds support for direct NOR boot mode on da850/omap-l138. Define the CONFIG_DIRECT_NOR_BOOT macro along with CONFIG_USE_NOR in the DA850/OMAP-L138 configuration file to enable this feature. Signed-off-by: Lad, Prabhakar Signed-off-by: Rajashekhara, Sudhakar Signed-off-by: Hadli, Manjunath --- include/configs/da850evm.h | 26 +++++++++++++++++++++++++- 1 files changed, 25 insertions(+), 1 deletions(-) diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index f33eba8..5c373bc 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -24,6 +24,13 @@ #define __CONFIG_H /* + * Define this when NOR U-Boot is loaded directly from flash as it + * must perform all the low level initialization itself. + * +#define CONFIG_DIRECT_NOR_BOOT +*/ + +/* * Board */ #define CONFIG_DRIVER_TI_EMAC @@ -43,10 +50,19 @@ #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_TEXT_BASE 0xc1080000 #define CONFIG_SYS_DA850_PLL_INIT #define CONFIG_SYS_DA850_DDR_INIT +#ifdef CONFIG_DIRECT_NOR_BOOT +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_DA8XX_GPIO +#define CONFIG_SYS_TEXT_BASE 0x60000000 +#define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) +#define CONFIG_DA850_LOWLEVEL +#else +#define CONFIG_SYS_TEXT_BASE 0xc1080000 +#endif + /* * Memory Info */ @@ -373,6 +389,7 @@ #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 #endif +#ifndef CONFIG_USE_NOR /* defines for SPL */ #define CONFIG_SPL #define CONFIG_SPL_SERIAL_SUPPORT @@ -382,9 +399,16 @@ #define CONFIG_SPL_STACK 0x8001ff00 #define CONFIG_SPL_TEXT_BASE 0x80000000 #define CONFIG_SPL_MAX_SIZE 32768 +#endif + /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 + +#ifdef CONFIG_DIRECT_NOR_BOOT +#define CONFIG_SYS_INIT_SP_ADDR 0x8001ff00 +#else #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ GENERATED_GBL_DATA_SIZE) +#endif /* CONFIG_DIRECT_NOR_BOOT */ #endif /* __CONFIG_H */