From patchwork Fri May 25 13:46:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 161354 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 08FF9B6F9A for ; Fri, 25 May 2012 23:47:53 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4C2012820E; Fri, 25 May 2012 15:47:28 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6D7WdB9km5Ti; Fri, 25 May 2012 15:47:28 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7AF412822B; Fri, 25 May 2012 15:47:01 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 639FD281D9 for ; Fri, 25 May 2012 15:46:50 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id v7mPtCKmvDID for ; Fri, 25 May 2012 15:46:49 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from moutng.kundenserver.de (moutng.kundenserver.de [212.227.17.10]) by theia.denx.de (Postfix) with ESMTP id 37A93281EA for ; Fri, 25 May 2012 15:46:41 +0200 (CEST) Received: from benhur.adnet.avionic-design.de (p548E07C9.dip0.t-ipconnect.de [84.142.7.201]) by mrelayeu.kundenserver.de (node=mreu0) with ESMTP (Nemesis) id 0LrG8W-1S4Ag10q8i-013JO5; Fri, 25 May 2012 15:46:33 +0200 Received: from mailbox.adnet.avionic-design.de (add-virt-zarafa.adnet.avionic-design.de [172.20.129.9]) by benhur.adnet.avionic-design.de (Postfix) with ESMTP id ACD142C4119; Fri, 25 May 2012 15:46:36 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by mailbox.adnet.avionic-design.de (Postfix) with ESMTP id A750B2A28198; Fri, 25 May 2012 15:46:32 +0200 (CEST) X-Virus-Scanned: amavisd-new at avionic-design.de Received: from mailbox.adnet.avionic-design.de ([127.0.0.1]) by localhost (mailbox.avionic-design.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vByzeUKgc0k9; Fri, 25 May 2012 15:46:31 +0200 (CEST) Received: from localhost (avionic-0098.adnet.avionic-design.de [172.20.31.233]) (Authenticated sender: thierry.reding) by mailbox.adnet.avionic-design.de (Postfix) with ESMTPA id 861B12A2818D; Fri, 25 May 2012 15:46:30 +0200 (CEST) From: Thierry Reding To: u-boot@lists.denx.de Date: Fri, 25 May 2012 15:46:26 +0200 Message-Id: <1337953588-20696-5-git-send-email-thierry.reding@avionic-design.de> X-Mailer: git-send-email 1.7.10.2 In-Reply-To: <1337953588-20696-1-git-send-email-thierry.reding@avionic-design.de> References: <1337953588-20696-1-git-send-email-thierry.reding@avionic-design.de> X-Provags-ID: V02:K0:EvDiBOqtk4Mz1CqX4yJURg83d5eFmgFcuwEsXUCXhG9 60s3tapU9UQyGGwdalTeCnA1BGXUCcvQSMEgoirprZLlDEl4mj Sr4rpc6sSBuAPwGTRD7Hy4IWc/q9lVyVjmwb4CpktizQzURfgX qZ17LOOXBbyjek4FZEMLqfj7YTyM3v2XqVpWqMkOah9LnZ3sX0 tEtttfaKySgVZcxJ1ey0LuSBX3toAPx1zkDymtJP75WhwsX4hB 1q3g1E0SORDbzwjhjoezmoUD8iPDISm4S9Gf/bBRln65ks6dlI CwN14BYH2A70M0Vx6BNJfZlIbZFHhxMgBCpdDFewSg7s99ehKj Godd7TwbQ1/3RGe/I2y28oxbcoWnk7dxAezVyCwBTj9sBW6FH3 B5DmCjnF4sOw/ipfyTbtQ/qXGRYQ8SyxILlgrShMw8qUNpv7KH jHbPA Cc: Tom Warren Subject: [U-Boot] [PATCH v2 5/7] tegra: Implement gpio_early_init() on Tamonten X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The PI4 GPIO is used on Tamonten to reset carrier board peripherals. Power sequencing hardware on the carrier pulls the reset low before powering up the Tegra, and the CPU is supposed to signal readiness, and therefore bring peripherals out of reset by pulling PI4 high. Signed-off-by: Thierry Reding --- Changes in v2: - new patch required for TEC support board/avionic-design/common/tamonten.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c index d9ecd23..2b19d1e 100644 --- a/board/avionic-design/common/tamonten.c +++ b/board/avionic-design/common/tamonten.c @@ -49,6 +49,15 @@ void gpio_config_uart(void) { } +#ifdef CONFIG_BOARD_EARLY_INIT_F +void gpio_early_init(void) +{ + gpio_request(GPIO_PI4, NULL); + gpio_direction_output(GPIO_PI4, 1); + gpio_free(GPIO_PI4); +} +#endif + #ifdef CONFIG_TEGRA2_MMC /* * Routine: pin_mux_mmc