From patchwork Wed Apr 25 03:33:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Troy Kisky X-Patchwork-Id: 154786 X-Patchwork-Delegate: hs@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3640DB6F6E for ; Wed, 25 Apr 2012 13:40:24 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 39DE528279; Wed, 25 Apr 2012 05:40:22 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id tb+YPKMfmNhX; Wed, 25 Apr 2012 05:40:22 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A2EB92827C; Wed, 25 Apr 2012 05:40:20 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9DFE82827B for ; Wed, 25 Apr 2012 05:40:18 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aIJAVQMAiws5 for ; Wed, 25 Apr 2012 05:40:18 +0200 (CEST) X-Greylist: delayed 399 seconds by postgrey-1.27 at theia; Wed, 25 Apr 2012 05:40:16 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from oproxy5-pub.bluehost.com (oproxy5-pub.bluehost.com [67.222.38.55]) by theia.denx.de (Postfix) with SMTP id 80E8028279 for ; Wed, 25 Apr 2012 05:40:15 +0200 (CEST) Received: (qmail 5285 invoked by uid 0); 25 Apr 2012 03:33:35 -0000 Received: from unknown (HELO box284.bluehost.com) (69.89.31.84) by cpoproxy2.bluehost.com with SMTP; 25 Apr 2012 03:33:35 -0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=boundarydevices.com; s=default; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=yxEYBlfAn5cIcuC0njDosdxuuJv9vi5zXcID9nL+T+E=; b=MEKrJYlWFkHqgoxbPZf4CRKwI+38soZsNdOfV+90ruONyvTFuQUyv6hGeCwb0t+0EyUCq+gCLtefMQTv6kPt/0oJWEpNNdlqDPOSczEUcZT94P+rs7sDnO/rLDYjDZQ2; Received: from [70.96.116.236] (helo=officeserver-2) by box284.bluehost.com with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1SMsyy-0003zT-G1; Tue, 24 Apr 2012 21:33:33 -0600 Received: from tkisky by officeserver-2 with local (Exim 4.76) (envelope-from ) id 1SMsyy-0004DX-FQ; Tue, 24 Apr 2012 20:33:32 -0700 From: Troy Kisky To: sbabic@denx.de Date: Tue, 24 Apr 2012 20:33:26 -0700 Message-Id: <1335324807-16177-2-git-send-email-troy.kisky@boundarydevices.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1335324807-16177-1-git-send-email-troy.kisky@boundarydevices.com> References: <1335324807-16177-1-git-send-email-troy.kisky@boundarydevices.com> X-Identified-User: {1412:box284.bluehost.com:boundar4:boundarydevices.com} {sentby:smtp auth 70.96.116.236 authed with troy.kisky@boundarydevices.com} Cc: u-boot@lists.denx.de, r49496@freescale.com, jason.hui@linaro.org, hs@denx.de Subject: [U-Boot] [PATCH 2/3] mx6qsabrelite: add i2c support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Troy Kisky Acked-by: Stefano Babic --- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 11 +++++++++++ include/configs/mx6qsabrelite.h | 8 ++++++++ 2 files changed, 19 insertions(+), 0 deletions(-) diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 1d09a72..8690f22 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -50,6 +50,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -67,6 +72,11 @@ iomux_v3_cfg_t uart2_pads[] = { MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), }; +iomux_v3_cfg_t i2c3_pads[] = { + MX6Q_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), + MX6Q_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), +}; + iomux_v3_cfg_t usdhc3_pads[] = { MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -282,6 +292,7 @@ int board_init(void) #ifdef CONFIG_MXC_SPI setup_spi(); #endif + imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads)); return 0; } diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index f52c3c7..311494b 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -58,6 +58,14 @@ #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) #endif +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0xfe + /* MMC Configs */ #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC