From patchwork Thu Feb 16 19:45:34 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Warren X-Patchwork-Id: 141667 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id AC1F4B6F9B for ; Fri, 17 Feb 2012 06:46:04 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C0416280A1; Thu, 16 Feb 2012 20:46:02 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 87oNPHrGqe7D; Thu, 16 Feb 2012 20:46:02 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2542128099; Thu, 16 Feb 2012 20:46:00 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9B25E28099 for ; Thu, 16 Feb 2012 20:45:57 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dgbjLFKIoU09 for ; Thu, 16 Feb 2012 20:45:56 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pw0-f44.google.com (mail-pw0-f44.google.com [209.85.160.44]) by theia.denx.de (Postfix) with ESMTPS id 6C60928097 for ; Thu, 16 Feb 2012 20:45:54 +0100 (CET) Received: by pbcwz7 with SMTP id wz7so2598101pbc.3 for ; Thu, 16 Feb 2012 11:45:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:x-nvconfidentiality; bh=GqZQt+gPk4MXr/4j06SRyJPyNpky+fO/71ySL6tlpO4=; b=m5MEzBow9HIlCuZfualMOvBRrgW4nsqDxZw6RsDZ8/mMroRhqaCgSzT2Seo+TSAGeb PkNh1Gi3g/FO8HAdk2oLHBM6PGB9RWDt/a2naTG3ymCBs3YH24xBRALdGuT7ouwjkzpM IEIN8D3qmWAoVXkefQLCmX6g6OKv61Lt4ijRA= Received: by 10.68.234.166 with SMTP id uf6mr11464402pbc.133.1329421553155; Thu, 16 Feb 2012 11:45:53 -0800 (PST) Received: from localhost.localdomain (ip68-106-253-43.ph.ph.cox.net. [68.106.253.43]) by mx.google.com with ESMTPS id 7sm14620951pbw.13.2012.02.16.11.45.50 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 16 Feb 2012 11:45:51 -0800 (PST) From: Tom Warren To: u-boot@lists.denx.de Date: Thu, 16 Feb 2012 12:45:34 -0700 Message-Id: <1329421534-12963-1-git-send-email-twarren@nvidia.com> X-Mailer: git-send-email 1.7.7.1 X-NVConfidentiality: public Cc: Tom Warren , twarren.nvidia@gmail.com Subject: [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP load using a constant in tegra2_start. Break it up into 4 loads using mov & orr. Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also compiled all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK. Signed-off-by: Tom Warren --- arch/arm/cpu/armv7/tegra2/ap20.c | 25 ++++++++++++++++++++----- 1 files changed, 20 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c index 4c44bb3..d2bc0d5 100644 --- a/arch/arm/cpu/armv7/tegra2/ap20.c +++ b/arch/arm/cpu/armv7/tegra2/ap20.c @@ -298,11 +298,26 @@ void tegra2_start(void) writel(0xC0, &pmt->pmt_cfg_ctl); /* - * If we are ARM7 - give it a different stack. We are about to - * start up the A9 which will want to use this one. - */ - asm volatile("ldr sp, =%c0\n" - : : "i"(AVP_EARLY_BOOT_STACK_LIMIT)); + * If we are ARM7 - give it a different stack. We are about to + * start up the A9 which will want to use this one. + */ + /* + * Note that the 'ldr sp,CONSTANT' version, below, doesn't + * work on gcc 4.2.2 (ELDK42), but does on gcc 4.4.1 and above. + * The work-around is to use the (ugly) 4-pass mov/orr below. + * + * asm volatile("ldr sp, =%c0\n" : : + * "i"(AVP_EARLY_BOOT_STACK_LIMIT)); + */ + + asm volatile("mov sp, %0" + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF)); + asm volatile("orr sp, %0" + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF00)); + asm volatile("orr sp, %0" + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF0000)); + asm volatile("orr sp, %0" + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF000000)); start_cpu((u32)_start); halt_avp();