| Message ID | 1329295802-28234-1-git-send-email-prabhakar@freescale.com |
|---|---|
| State | Accepted |
| Commit | 119a55f9cff4884a0ad3353d8752ee8787e232da |
| Delegated to: | Andy Fleming |
| Headers | show |
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 93de9df..7bfa2d5 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -179,6 +179,11 @@ l2_disabled: andi. r1,r3,L1CSR0_DCE@l beq 2b +/* + * Ne need to setup interrupt vector for NAND SPL + * because NAND SPL never compiles it. + */ +#if !defined(CONFIG_NAND_SPL) /* Setup interrupt vectors */ lis r1,CONFIG_SYS_MONITOR_BASE@h mtspr IVPR,r1 @@ -217,6 +222,7 @@ l2_disabled: mtspr IVOR14,r4 /* 14: Instruction TLB error */ addi r4,r3,DebugBreakpoint - _start + _START_OFFSET mtspr IVOR15,r4 /* 15: Debug */ +#endif /* Clear and set up some registers. */ li r0,0x0000
NAND SPL code never compile the vector table. So no need to setup interrupt vector table for NAND SPL. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> --- Applies on http://git.denx.de/u-boot.git branch master arch/powerpc/cpu/mpc85xx/start.S | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)