From patchwork Mon Nov 28 13:42:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Schwierzeck X-Patchwork-Id: 127992 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id DEF24B6F7F for ; Tue, 29 Nov 2011 00:43:11 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1B5F2280EC; Mon, 28 Nov 2011 14:43:09 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id iQeZWO88Yck3; Mon, 28 Nov 2011 14:43:04 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D96C7280ED; Mon, 28 Nov 2011 14:43:03 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F06BF280ED for ; Mon, 28 Nov 2011 14:42:59 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id N4DnR2rgvvMV for ; Mon, 28 Nov 2011 14:42:57 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-bw0-f44.google.com (mail-bw0-f44.google.com [209.85.214.44]) by theia.denx.de (Postfix) with ESMTPS id 09667280EC for ; Mon, 28 Nov 2011 14:42:55 +0100 (CET) Received: by bkbzv15 with SMTP id zv15so8272017bkb.3 for ; Mon, 28 Nov 2011 05:42:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=tagXCEbXyTpsVFW2PGDuqjS8OLxFNkpqF3TrI4Jbl2s=; b=ev5lnNjbHHHgqaaAr/3oym4noHtVfzV63QWVCLXKKJYpO4yO39VETD/GUJDS1E2+G2 5IT9zSqG3/IZVa3lt2bTSE/5OqYLrLJU3MywxexeHiBDGUWyGl53Ueu6TIxlqxzm/NMs 4YMwM+T8MKWO9kbn9AxPW0mhkTBEESDuf5fL8= Received: by 10.204.36.8 with SMTP id r8mr39443319bkd.129.1322487775307; Mon, 28 Nov 2011 05:42:55 -0800 (PST) Received: from pc000853.sas.sys.sphairon.com (dslb-088-073-247-133.pools.arcor-ip.net. [88.73.247.133]) by mx.google.com with ESMTPS id fa8sm21523053bkc.14.2011.11.28.05.42.52 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 28 Nov 2011 05:42:54 -0800 (PST) From: Daniel Schwierzeck To: u-boot@lists.denx.de Date: Mon, 28 Nov 2011 14:42:48 +0100 Message-Id: <1322487768-19439-1-git-send-email-daniel.schwierzeck@googlemail.com> X-Mailer: git-send-email 1.7.7.2 Cc: Thomas Lange , Thomas Langer , Shinya Kuribayashi Subject: [U-Boot] [PATCH] MIPS: fix endianess handling X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards. Adapt linking of standalone applications to pass through endianess options to LD. Build tested with: - ELDK 4 mips_4KC- and mips4KCle - Sourcery CodeBench Lite 2011.03-93 Signed-off-by: Daniel Schwierzeck Cc: Thomas Lange Cc: Mike Frysinger Cc: Wolfgang Denk --- Another try to finally fix this originated by discussion: [1] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/118111/focus=118122 Related discussions: [2] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/81572 [3] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/45404 README | 6 ++++++ arch/mips/cpu/mips32/config.mk | 21 +++++++++++++++------ boards.cfg | 4 ++-- examples/standalone/Makefile | 6 +++++- 4 files changed, 28 insertions(+), 9 deletions(-) diff --git a/README b/README index 07f1d11..468bfdf 100644 --- a/README +++ b/README @@ -374,6 +374,12 @@ The following options need to be configured: Defines the string to utilize when trying to match PCIe device tree nodes for the given platform. +- Generic CPU options: + CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN + + Defines the endianess of the CPU. Implementation of those + values is arch specific. + - Intel Monahans options: CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk index 4d1b273..a1cd590 100644 --- a/arch/mips/cpu/mips32/config.mk +++ b/arch/mips/cpu/mips32/config.mk @@ -27,14 +27,23 @@ # Note: Toolchains with binutils prior to v2.16 # are no longer supported by U-Boot MIPS tree! # -MIPSFLAGS = -march=mips32r2 +MIPSFLAGS := -march=mips32r2 +# Handle special prefix in ELDK 4.0 toolchain ifneq (,$(findstring 4KCle,$(CROSS_COMPILE))) -ENDIANNESS = -EL -else -ENDIANNESS = -EB +ENDIANNESS := -EL endif -MIPSFLAGS += $(ENDIANNESS) +ifdef CONFIG_SYS_LITTLE_ENDIAN +ENDIANNESS := -EL +endif + +ifdef CONFIG_SYS_BIG_ENDIAN +ENDIANNESS := -EB +endif + +# Default to EB if no endianess is configured +ENDIANNESS ?= -EB -PLATFORM_CPPFLAGS += $(MIPSFLAGS) +PLATFORM_CPPFLAGS += $(MIPSFLAGS) $(ENDIANNESS) +PLATFORM_LDFLAGS += $(ENDIANNESS) diff --git a/boards.cfg b/boards.cfg index c83d861..2cd917e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -324,13 +324,13 @@ dbau1000 mips mips32 dbau1x00 - dbau1100 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1100 dbau1500 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1500 dbau1550 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 -dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 +dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN gth2 mips mips32 - - au1x00 incaip mips mips32 incaip - incaip incaip_100MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=100000000 incaip_133MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=133000000 incaip_150MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=150000000 -pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000 +pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000,SYS_LITTLE_ENDIAN qemu_mips mips mips32 qemu-mips - - qemu-mips tb0229 mips mips32 vct_premium mips mips32 vct micronas - vct:VCT_PREMIUM diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index e23865b..eab23b4 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -88,6 +88,10 @@ endif CFLAGS_NTR := $(call cc-option,-fno-toplevel-reorder) CFLAGS += $(CFLAGS_NTR) +# Pass through endianess settings in LDFLAGS to LD +LDFLAGS_ENDIAN += $(filter -EB,$(LDFLAGS)) +LDFLAGS_ENDIAN += $(filter -EL,$(LDFLAGS)) + all: $(obj).depend $(OBJS) $(LIB) $(SREC) $(BIN) $(ELF) ######################################################################### @@ -96,7 +100,7 @@ $(LIB): $(obj).depend $(LIBOBJS) $(ELF): $(obj)%: $(obj)%.o $(LIB) - $(LD) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \ + $(LD) $(LDFLAGS_ENDIAN) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \ -o $@ -e $(SYM_PREFIX)$(notdir $(<:.o=)) $< $(LIB) \ -L$(gcclibdir) -lgcc