From patchwork Wed Nov 9 14:15:02 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 124556 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 26A87B6F75 for ; Thu, 10 Nov 2011 01:15:32 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0073B29A32; Wed, 9 Nov 2011 15:15:29 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xlBU+E0BBa1B; Wed, 9 Nov 2011 15:15:28 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D205429A33; Wed, 9 Nov 2011 15:15:23 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D9FF229A33 for ; Wed, 9 Nov 2011 15:15:21 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id lKTFPA3zS7Xh for ; Wed, 9 Nov 2011 15:15:21 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe006.messaging.microsoft.com [216.32.181.186]) by theia.denx.de (Postfix) with ESMTPS id A7E5C29A32 for ; Wed, 9 Nov 2011 15:15:17 +0100 (CET) Received: from mail134-ch1-R.bigfish.com (10.43.68.251) by CH1EHSOBE018.bigfish.com (10.43.70.68) with Microsoft SMTP Server id 14.1.225.22; Wed, 9 Nov 2011 14:14:53 +0000 Received: from mail134-ch1 (localhost.localdomain [127.0.0.1]) by mail134-ch1-R.bigfish.com (Postfix) with ESMTP id 059BD18D8177; Wed, 9 Nov 2011 14:15:07 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-SS: 13, Received: from mail134-ch1 (localhost.localdomain [127.0.0.1]) by mail134-ch1 (MessageSwitch) id 1320848106877508_12067; Wed, 9 Nov 2011 14:15:06 +0000 (UTC) Received: from CH1EHSMHS003.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.251]) by mail134-ch1.bigfish.com (Postfix) with ESMTP id C8AF7A6804C; Wed, 9 Nov 2011 14:15:06 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS003.bigfish.com (10.43.70.3) with Microsoft SMTP Server (TLS) id 14.1.225.22; Wed, 9 Nov 2011 14:15:15 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.339.2; Wed, 9 Nov 2011 08:15:13 -0600 Received: from fabio-Latitude-E6410.am.freescale.net ([10.29.240.188]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id pA9EF5xn008547; Wed, 9 Nov 2011 08:15:10 -0600 (CST) From: Fabio Estevam To: Date: Wed, 9 Nov 2011 12:15:02 -0200 Message-ID: <1320848103-19495-3-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1320848103-19495-1-git-send-email-fabio.estevam@freescale.com> References: <1320848103-19495-1-git-send-email-fabio.estevam@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Fabio Estevam Subject: [U-Boot] [PATCH 3/4] mx31: Use proper IO accessor for GPR register X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Use proper IO accessor for GPR register. Signed-off-by: Fabio Estevam Acked-by: Stefano Babic --- arch/arm/cpu/arm1136/mx31/generic.c | 5 +++-- arch/arm/include/asm/arch-mx31/imx-regs.h | 7 ++++++- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index 1621e9e..167e97a 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -144,14 +144,15 @@ void mx31_set_pad(enum iomux_pins pin, u32 config) void mx31_set_gpr(enum iomux_gp_func gp, char en) { u32 l; + struct iomuxc_regs *iomuxc = (struct iomuxc_regs *)IOMUXC_BASE; - l = readl(IOMUXC_GPR); + l = readl(&iomuxc->gpr); if (en) l |= gp; else l &= ~gp; - writel(l, IOMUXC_GPR); + writel(l, &iomuxc->gpr); } void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs) diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index afdaa1c..0147920 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -98,6 +98,12 @@ struct iim_regs { u32 iim_scs3; }; +struct iomuxc_regs { + u32 unused1; + u32 unused2; + u32 gpr; +}; + struct mx3_cpu_type { u8 srev; u32 v; @@ -636,7 +642,6 @@ struct esdc_regs { #define WEIM_BASE 0xb8002000 #define IOMUXC_BASE 0x43FAC000 -#define IOMUXC_GPR (IOMUXC_BASE + 0x8) #define IOMUXC_SW_MUX_CTL(x) (IOMUXC_BASE + 0xc + (x) * 4) #define IOMUXC_SW_PAD_CTL(x) (IOMUXC_BASE + 0x154 + (x) * 4)