From patchwork Mon Oct 24 07:02:03 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 121280 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1493DB6F99 for ; Mon, 24 Oct 2011 18:02:13 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5EA4328656; Mon, 24 Oct 2011 09:02:11 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jljR9hoS8N-x; Mon, 24 Oct 2011 09:02:11 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8F5372862E; Mon, 24 Oct 2011 09:02:09 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C45DC28636 for ; Mon, 24 Oct 2011 09:02:07 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fJYYrT0bZIAZ for ; Mon, 24 Oct 2011 09:02:07 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.df.lth.se (mail.df.lth.se [194.47.250.12]) by theia.denx.de (Postfix) with ESMTPS id A2B212861D for ; Mon, 24 Oct 2011 09:02:05 +0200 (CEST) Received: from mer.df.lth.se (mer.df.lth.se [194.47.250.37]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.df.lth.se (Postfix) with ESMTPS id 662D465D94; Mon, 24 Oct 2011 09:02:05 +0200 (CEST) Received: from mer.df.lth.se (triad@localhost.localdomain [127.0.0.1]) by mer.df.lth.se (8.14.3/8.14.3/Debian-9.4) with ESMTP id p9O724cE029699; Mon, 24 Oct 2011 09:02:04 +0200 Received: (from triad@localhost) by mer.df.lth.se (8.14.3/8.14.3/Submit) id p9O724gw029698; Mon, 24 Oct 2011 09:02:04 +0200 From: Linus Walleij To: Albert ARIBAUD Date: Mon, 24 Oct 2011 09:02:03 +0200 Message-Id: <1319439723-29671-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.7.2.5 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 3/7 v2] integrator: do not test first part of the memory X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de When booting from Flash, the Integrator remaps its flash memory from 0x24000000 to 0x00000000, and starts executing it at 0x00000000. This ROM thus hides the RAM underneath and first 0x40000 bytes of the memory cannot be tested by get_ram_size(). So let's test from 0x40000 to the end of detected memory instead. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Rebased to U-Boot ARM HEAD at Alberts request, see message 4EA1C8E7.7090105@aribaud.net --- board/armltd/integrator/integrator.c | 19 +++++++++++++++---- 1 files changed, 15 insertions(+), 4 deletions(-) diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c index c8d2bc7..83f047c 100644 --- a/board/armltd/integrator/integrator.c +++ b/board/armltd/integrator/integrator.c @@ -86,6 +86,15 @@ int misc_init_r (void) return (0); } +/* + * The Integrator remaps the Flash memory to 0x00000000 and executes U-Boot + * from there, which means we cannot test the RAM underneath the ROM at this + * point. It will be unmapped later on, when we are executing from the + * relocated in RAM U-Boot. We simply assume that this RAM is usable if the + * RAM on higher addresses works fine. + */ +#define REMAPPED_FLASH_SZ 0x40000 + int dram_init (void) { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; @@ -111,15 +120,17 @@ extern void dram_query(void); * */ sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4; - gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift; - gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE + + REMAPPED_FLASH_SZ, 0x01000000 << sdram_shift); } #else - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE + + REMAPPED_FLASH_SZ, PHYS_SDRAM_1_SIZE); #endif /* CM_SPD_DETECT */ + /* We only have one bank of RAM, set it to whatever was detected */ + gd->bd->bi_dram[0].size = gd->ram_size; return 0; }