diff mbox

[U-Boot,2/2] TT-01: add basic board support for HALE TT-01

Message ID 1316693575-20726-3-git-send-email-helmut.raiger@hale.at
State Superseded
Headers show

Commit Message

Helmut Raiger Sept. 22, 2011, 12:12 p.m. UTC 
This adds basic board support for TT-01 based on
the bluetechnix i.MX31 SOM. Currently only NOR-Flash
boot is supported.

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
---
 Makefile                  |    4 +
 board/hale/tt01/Makefile  |   53 +++++++++
 board/hale/tt01/config.mk |    1 +
 board/hale/tt01/tt01.c    |   98 ++++++++++++++++
 include/configs/tt01.h    |  283 +++++++++++++++++++++++++++++++++++++++++++++
 5 files changed, 439 insertions(+), 0 deletions(-)
 create mode 100644 board/hale/tt01/Makefile
 create mode 100644 board/hale/tt01/config.mk
 create mode 100644 board/hale/tt01/tt01.c
 create mode 100644 include/configs/tt01.h

Comments

Fabio Estevam Sept. 22, 2011, 1:36 p.m. UTC | #1 
On Thu, Sep 22, 2011 at 9:12 AM, Helmut Raiger <helmut.raiger@hale.at> wrote:
> This adds basic board support for TT-01 based on
> the bluetechnix i.MX31 SOM. Currently only NOR-Flash
> boot is supported.
>
> Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
> ---
>  Makefile                  |    4 +
>  board/hale/tt01/Makefile  |   53 +++++++++
>  board/hale/tt01/config.mk |    1 +
>  board/hale/tt01/tt01.c    |   98 ++++++++++++++++
>  include/configs/tt01.h    |  283 +++++++++++++++++++++++++++++++++++++++++++++
>  5 files changed, 439 insertions(+), 0 deletions(-)
>  create mode 100644 board/hale/tt01/Makefile
>  create mode 100644 board/hale/tt01/config.mk
>  create mode 100644 board/hale/tt01/tt01.c
>  create mode 100644 include/configs/tt01.h

You missed to add an entry to the MAINTAINERS file.

...

> diff --git a/board/hale/tt01/config.mk b/board/hale/tt01/config.mk
> new file mode 100644
> index 0000000..a7887ba
> --- /dev/null
> +++ b/board/hale/tt01/config.mk
> @@ -0,0 +1 @@
> +CONFIG_SYS_TEXT_BASE = 0xa0000000

Do you really need to create one file to store a single line?

You can place CONFIG_SYS_TEXT_BASE in the tt01.h

> diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
> new file mode 100644
> index 0000000..3bae2b4
> --- /dev/null
...

> +       /* start CSPI3 clock (3 = always on except if PLL off) */
> +       writel(readl(CCM_CGR0) | (3 << 16), CCM_CGR0);

You can use setbits_le32 here.

Regards,

Fabio Estevam
Stefano Babic Sept. 22, 2011, 1:51 p.m. UTC | #2 
On 09/22/2011 02:12 PM, Helmut Raiger wrote:
> This adds basic board support for TT-01 based on
> the bluetechnix i.MX31 SOM. Currently only NOR-Flash
> boot is supported.
> 
> Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>

Hi Helmut,

> ---
>  Makefile                  |    4 +
>  board/hale/tt01/Makefile  |   53 +++++++++
>  board/hale/tt01/config.mk |    1 +
>  board/hale/tt01/tt01.c    |   98 ++++++++++++++++
>  include/configs/tt01.h    |  283 +++++++++++++++++++++++++++++++++++++++++++++
>  5 files changed, 439 insertions(+), 0 deletions(-)
>  create mode 100644 board/hale/tt01/Makefile
>  create mode 100644 board/hale/tt01/config.mk
>  create mode 100644 board/hale/tt01/tt01.c
>  create mode 100644 include/configs/tt01.h

Your entry in MAINTAINERS file is missing and you have not updated
boards.cfg.

> 
> diff --git a/Makefile b/Makefile
> index e9ba6a4..aaed9e6 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -908,6 +908,10 @@ mx31pdk_nand_config	: unconfig
>  	fi
>  	@$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
>  
> +tt01_config : unconfig
> +	@mkdir -p $(obj)include
> +	@$(MKCONFIG) -n $@ -a tt01 arm arm1136 tt01 hale mx31
> +

There is no need anymore to change the main Makefile - new boards are
added only to voards.cfg.

>  #########################################################################
>  ## ARM1176 Systems
>  #########################################################################
> diff --git a/board/hale/tt01/Makefile b/board/hale/tt01/Makefile
> new file mode 100644
> index 0000000..18c83bb
> --- /dev/null
> +++ b/board/hale/tt01/Makefile
> @@ -0,0 +1,53 @@
> +##

Double #

> +# (C) Copyright 2009 HALE electronic <helmut.raiger@hale.at>
> +# (C) Copyright 2000-2006
> +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB	= $(obj)lib$(BOARD).o
> +
> +COBJS	:= tt01.o
> +# reuse the mx31pdk low-level setup
> +SOBJS	:= ../../freescale/mx31pdk/lowlevel_init.o

It is always a good idea to reuse code, but taking it to another board
seems hackish. Your board could become broken if the mx31pdk's
maintainer change his code.

Reading this file I do not see (except setting the AIPS) no good reason
to write this part in assembly. Everything can be done for example in
board_early_init_f, and even better we can rationalize this code and put
it into arch/cpu/arm1136/mx31.

> +#########################################################################
> diff --git a/board/hale/tt01/config.mk b/board/hale/tt01/config.mk
> new file mode 100644
> index 0000000..a7887ba
> --- /dev/null
> +++ b/board/hale/tt01/config.mk
> @@ -0,0 +1 @@
> +CONFIG_SYS_TEXT_BASE = 0xa0000000

There is no need for a config.mk => move CONFIG_SYS_TEXT_BASE into tt01.h

> +#include <common.h>
> +#include <netdev.h>
> +#include <command.h>
> +#include <asm/arch/clock.h>
> +#include <asm/io.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define BOARD_STRING	"Board: HALE TT-01"
> +
> +void tt01_spi3_hw_init(void)
> +{
> +	/* CSPI3 */
> +	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_MISO, MUX_CTL_FUNC));
> +	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_MOSI, MUX_CTL_FUNC));
> +	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_SCLK, MUX_CTL_FUNC));
> +    /* CSPI3, SS0 = Atlas */
     ^-spaces instead of TAB

> +	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI2_SS0, MUX_CTL_ALT1));
> +
> +	/* start CSPI3 clock (3 = always on except if PLL off) */
> +	writel(readl(CCM_CGR0) | (3 << 16), CCM_CGR0);
> +}
> +
> +int dram_init(void)
> +{
> +	/* dram_init must store complete ramsize in gd->ram_size */
> +	gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE,
> +			PHYS_SDRAM_1_SIZE);
> +	return 0;
> +}
> +
> +void dram_init_banksize(void)
> +{
> +	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> +	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
> +}

If, as in your case, you have only one bank and CONFIG_SYS_SDRAM_BASE =
PHYS_SDRAM_1, you can drop completely this function. This is a weak
function, and your code duplicates the "standard" behavior in
arch/arm/lib/board.c

> +
> +int board_early_init_f(void)
> +{
> +	/* CS4: FPGA incl. network controller */
> +	__REG(CSCR_U(4)) = 0x0000dcf6;
> +	__REG(CSCR_L(4)) = 0x444A4541;
> +	__REG(CSCR_A(4)) = 0x44443302;

Time to fix access to WEIM. As access via __REG are not allowed for new
code, please add a structure for WEIM and use accessors to write these
registers.

> +
> +int board_init(void)
> +{
> +	/* board id for linux, not in mach-types.h yet */
> +	gd->bd->bi_arch_number = 3726;		/* MACH_TYPE_TT01 = 3726 */

Then define CONFIG_MACH_TYPE into tt01.h and drop the previous lines.
The MACH-ID is automatically set by common code if  CONFIG_MACH_TYPE is set.

> diff --git a/include/configs/tt01.h b/include/configs/tt01.h
> new file mode 100644
> index 0000000..22fb806
> --- /dev/null
> +++ b/include/configs/tt01.h
> @@ -0,0 +1,283 @@
> +/*
> + * (C) Copyright 2011 HALE electronic <helmut.raiger@hale.at>
> + * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
> + *
> + * Configuration settings for the HALE TT-01 board.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#include <asm/arch/imx-regs.h>
> +
> +/* High Level Configuration Options */
> +#define CONFIG_ARM1136
> +#define CONFIG_MX31
> +#define CONFIG_MX31_HCLK_FREQ	26000000
> +#define CONFIG_MX31_CLK32	32768
> +
> +#define CONFIG_DISPLAY_CPUINFO
> +#define CONFIG_DISPLAY_BOARDINFO
> +
> +#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_INITRD_TAG
> +
> +/*-----------------------------------------------------------------------
> + * Physical Memory Map:
> + *   CS settings are defined by i.MX31:
> + *     - CSD0 and CDS1 are 256MB each, starting at 0x80000000 and 0x9000000
> + *     - CS0 and CS1 are 128MB each, at A0000000 and A8000000
> + *     - CS2 to CS5 are 32MB each, at B0.., B2.., B4.., B6..
> + *
> + * HALE set-up of the bluetechnix board for now is:
> + *   - 128MB DDR (2x64MB, 2x16bit), connected to 32bit DDR ram interface
> + *   - NOR-Flash (Spansion 32MB MCP, Flash+16MB PSRAM), 16bit interface at CS0
> + *		- S71WS256ND0BFWYM (and CS1 for 64MB S71WS512ND0 without PSRAM)
> + *        the flash chip is a mirrorbit S29WS256N !
> + *   - the PSRAM is hooked to CS5 (0xB6000000)
> + *   - Intel Strata Flash PF48F2000P0ZB00, 16bit interface at (CS0 or) CS1
> + *     - 64Mbit = 8MByte (will go away in the production set-up)
> + *   - NAND-Flash NAND01GR3B2BZA6 at NAND-FC:
> + *		1Gbit=128MB, 2048+64 bytes/page, 64pages x 1024 blocks
> + *   - Ethernet controller SMC9118 at CS4 via FPGA, 16bit interface
> + *
> + * u-boot will support the 32MB nor flash and the 128MB NAND flash, the PSRAM
> + * is not used right now. We should be able to reduce the SOM to NAND flash
> + * only and boot from there.

Ok, understood. You will use the SPL framework later.

> + */
> +#define CONFIG_NR_DRAM_BANKS	1
> +#define PHYS_SDRAM_1		CSD0_BASE
> +#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
> +
> +#define CONFIG_BOARD_EARLY_INIT_F
> +
> +#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
> +#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
> +#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
> +#define CONFIG_SYS_GBL_DATA_OFFSET \
> +	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_ADDR	\
> +	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
> +
> +/* default load address, 1MB up the road */
> +#define CONFIG_SYS_LOAD_ADDR		(PHYS_SDRAM_1+0x100000)

> +
> +/*-----------------------------------------------------------------------
> + * Stack sizes
> + *
> + * The stack sizes are set up in start.S using the settings below
> + */
> +#define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */
> +
> +/*
> + * Size of malloc() pool, make sure possible frame buffer fits
> + */
> +#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 10*1024*1024)

10 MB for heap in bootloader ? Is it ok ? I am only asking if it is
really wanted.

> +/* Bytes reserved for initial data */
> +#define CONFIG_SYS_GBL_DATA_SIZE	128

This is automatically generated. You should not set it.

> +#define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
> +#define CONFIG_FLASH_CFI_DRIVER		/* Use drivers/cfi_flash.c */
> +#define CONFIG_FLASH_SPANSION_S29WS_N
> +/* TODO: bluetechnix did undefine these for some purpose

if you do not need to undefine, you can drop this comment. Maybe there
is no issues with lock/unlock mechanism with the flash you have chosen.

> +#define CONFIG_SYS_FLASH_BASE		CS0_BASE
> +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
> +#define CONFIG_SYS_MAX_FLASH_SECT (254+8) /* max number of sectors per chip */
> +
> +/*---------------------------------------------------------------------------
> + * FLASH and environment organization, only the Spansion chip is supported:
> + * - it has 254 * 128kB + 8 * 32kB blocks
> + * - this setup uses 4*32k+128k as monitor space = 0xA000 0000 to 0xA003 FFFF
> + *		and as environment 2 sections with 128k =
> + *		A004 0000 to 0xA005 FFFF and 0xA006 0000 to 0xA007 FFFF
> + * - this could be less, but no-one is going to use the NOR flash anyway.
> + *
> + * Monitor is at the beginning of the NOR-Flash, 1MB reserved
> + */
> +#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
> +#define CONFIG_SYS_MONITOR_LEN		(1024 * 1024)
> +
> +#define	CONFIG_ENV_IS_IN_FLASH	1
> +#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
> +#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE

Regarding your previous comment: you could set CONFIG_ENV_SIZE to a
smaller value as CONFIG_ENV_SECT_SIZE, and this can speed up get/set of
the environment. Or you could save the environment in tha last (smaller)
sectors.

> +
> +/* S29WS256N (inside S71WS256ND0) has 4 32KiB small sectors at both ends. */
> +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)

The comment is correct, but it has nothing to do with the defines,
because you are not putting the env in the 32KiB sectors.

> +
> +/* Hardware drivers */
> +
> +/*
> + * on TT-01 UART1 pins are used by Audio, so we use UART2
> + *   make sure that the transceiver is enabled during PL=1 for testing!

What does it mean PL=1 ?

> +/***********************************************************
> + * Command definition
> + ***********************************************************/
> +
> +#include <config_cmd_default.h>
> +
> +/* this is currently not supported, mxc_nand.c is too incomplete for it */

Only for my understanding: Which is the issue with mxc_nand.c ? At the
moment, we have several boards using it, and I wonder it is incomplete.
What do you mean ?

> +/* currently a default setting for booting via script is implemented
> + *   set user to login name and serverip to tftp host, define your
> + *   boot behaviour in bootscript.loginname
> + */

Wrong multiline comment. This must be fixed globally.

Best regards,
Stefano Babic
Wolfgang Denk Sept. 22, 2011, 2:08 p.m. UTC | #3 
Dear Helmut Raiger,

In message <1316693575-20726-3-git-send-email-helmut.raiger@hale.at> you wrote:
> This adds basic board support for TT-01 based on
> the bluetechnix i.MX31 SOM. Currently only NOR-Flash
> boot is supported.
> 
> Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
> ---
>  Makefile                  |    4 +
>  board/hale/tt01/Makefile  |   53 +++++++++
>  board/hale/tt01/config.mk |    1 +
>  board/hale/tt01/tt01.c    |   98 ++++++++++++++++
>  include/configs/tt01.h    |  283 +++++++++++++++++++++++++++++++++++++++++++++
>  5 files changed, 439 insertions(+), 0 deletions(-)
>  create mode 100644 board/hale/tt01/Makefile
>  create mode 100644 board/hale/tt01/config.mk
>  create mode 100644 board/hale/tt01/tt01.c
>  create mode 100644 include/configs/tt01.h

Entry to MAINTAINERS missing.

> diff --git a/Makefile b/Makefile
> index e9ba6a4..aaed9e6 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -908,6 +908,10 @@ mx31pdk_nand_config	: unconfig
>  	fi
>  	@$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
>  
> +tt01_config : unconfig
> +	@mkdir -p $(obj)include
> +	@$(MKCONFIG) -n $@ -a tt01 arm arm1136 tt01 hale mx31

We don't add boards to Makefile any more.  Please add instead to
boards.cfg 

...
> +	/* start CSPI3 clock (3 = always on except if PLL off) */
> +	writel(readl(CCM_CGR0) | (3 << 16), CCM_CGR0);

Please use setbits() instead.


> +int board_early_init_f(void)
> +{
> +	/* CS4: FPGA incl. network controller */
> +	__REG(CSCR_U(4)) = 0x0000dcf6;
> +	__REG(CSCR_L(4)) = 0x444A4541;
> +	__REG(CSCR_A(4)) = 0x44443302;

We don't allow such accesses any more.  Please use proper I/O
accessors instead.

And please introduce some symbolic constants for the magic numbers,
and add comments whatthese are.

> +int board_init(void)
> +{
> +	/* board id for linux, not in mach-types.h yet */
> +	gd->bd->bi_arch_number = 3726;		/* MACH_TYPE_TT01 = 3726 */

NAK.  Please use standard approach for handling the mach_id.

> +/*-----------------------------------------------------------------------
> + * Physical Memory Map:
...

Incorrect multiline comment style.  Please fix globally.

...
> +#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
> +#define CONFIG_SYS_MONITOR_LEN		(1024 * 1024)

Are you really, really sure about this?  I doubt it...

> +#define	CONFIG_ENV_IS_IN_FLASH	1

Please do not define values for macros that select features only.
Please fix globally.

> +#include <config_cmd_default.h>
> +
> +/* this is currently not supported, mxc_nand.c is too incomplete for it */
> +#undef CONFIG_CMD_MTDPARTS

Please do not undef what is not defined in the first place.


Best regards,

Wolfgang Denk
Helmut Raiger Sept. 28, 2011, 12:48 p.m. UTC | #4 
I tried to fix the magic numbers used by ALL mx31 boards (except one CS in qong.c)
by using some macros. I stayed away from bitfields as it would have resulted
in a very verbose change (something like the setup of CS 3 in qong.c).

To verify the code I used this helper:

-------------- cut -----------
#include <stdio.h>

typedef unsigned int uint;

/* 13 fields of the upper CS control register */
#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
		cnc, wsc, ew, wws, edc) \
		((sp) << 31 | (wp) << 30 | (bcd) << 28 | (psz) << 22 | (pme) << 21 |\
		 (sync) << 20 | (dol) << 16 | (cnc) << 14 | (wsc) << 8 | (ew) << 7 |\
		 (wws) << 4 | (edc) << 0)
/* 12 fields of the lower CS control register */
#define CSCR_L(oea, oen, ebwa, ebwn, \
		csa, ebc, dsz, csn, psr, cre, wrap, csen) \
		((oea) << 28 | (oen) << 24 | (ebwa) << 20 | (ebwn) << 16 |\
		 (csa) << 12 | (ebc) << 11 | (dsz) << 8 | (csn) << 4 |\
		 (psr) << 3 | (cre) << 2 | (wrap) << 1 | (csen) << 0)
/* 14 fields of the additional CS control register */
#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
		wwu, age, cnc2, fce) \
		((ebra) << 28 | (ebrn) << 24 | (rwa) << 20 | (rwn) << 16 |\
		 (mum) << 15 | (lah) << 13 | (lbn) << 10 | (lba) << 8 |\
		 (dww) << 6 | (dct) << 4 | (wwu) << 3 |\
		 (age) << 2 | (cnc2) << 1 | (fce) << 0)

void decode(unsigned int u, unsigned int l, unsigned int a)
{
	/* 13 fields of the upper CS control register */
	uint sp = (u >> 31) & 1;
	uint wp = (u >> 30) & 1;
	uint bcd = (u >> 28) & 1;
	uint bcs = (u >> 24) & 15;
	uint psz = (u >> 22) & 3;
	uint pme = (u >> 21) & 1;
	uint sync = (u >> 20) & 1;
	uint dol = (u >> 16) & 15;
	uint cnc = (u >> 14) & 3;
	uint wsc = (u >> 8) & 31;
	uint ew = (u >> 7) & 1;
	uint wws = (u >> 4) & 7;
	uint edc = (u >> 0) & 15;

	/* 12 fields of the lower CS control register */
	uint oea = (l >> 28) & 15;
	uint oen = (l >> 24) & 15;
	uint ebwa = (l >> 20) & 15;
	uint ebwn = (l >> 16) & 15;
	uint csa = (l >> 12) & 15;
	uint ebc = (l >> 11) & 1;
	uint dsz = (l >> 8) & 7;
	uint csn = (l >> 4) & 15;
	uint psr = (l >> 3) & 1;
	uint cre = (l >> 2) & 1;
	uint wrap = (l >> 1) & 1;
	uint csen = (l >> 0) & 1;

	/* 14 fields of the additional CS control register */
	uint ebra = (a >> 28) & 15;
	uint ebrn = (a >> 24) & 15;
	uint rwa = (a >> 20) & 15;
	uint rwn = (a >> 16) & 15;
	uint mum = (a >> 15) & 1;
	uint lah = (a >> 13) & 3;
	uint lbn = (a >> 10) & 7;
	uint lba = (a >> 8) & 3;
	uint dww = (a >> 6) & 3;
	uint dct = (a >> 4) & 3;
	uint wwu = (a >> 3) & 1;
	uint age = (a >> 2) & 1;
	uint cnc2 = (a >> 1) & 1;
	uint fce = (a >> 0) & 1;

	printf("---- decode(0x%08x, 0x%08x, 0x%08x):\n", u, l, a);

	printf("/*     sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */\n");
	printf("CSCR_U(%2u,%2u,%3u,%3u,%3u,%3u,%4u,%3u,%3u,%3u,%2u,%3u,%3u)\n",
		sp, wp, bcd, bcs, psz, pme, sync, dol, cnc, wsc, ew, wws, edc);
	if(CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, cnc, wsc, ew, wws, edc) != u)
		printf("U is wrong\n");

	printf("/*     oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */\n");
	printf("CSCR_L(%3u,%3u,%4u,%4u,%3u,%3u,%3u,%3u,%3u,%3u,%4u,%4u)\n",
		oea, oen, ebwa, ebwn, csa, ebc, dsz, csn, psr, cre, wrap, csen);
	if(CSCR_L(oea, oen, ebwa, ebwn, csa, ebc, dsz, csn, psr, cre, wrap, csen) != l)
		printf("L is wrong\n");

	printf("/*   ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce */\n");
	printf("CSCR_A(%2u,%4u,%3u,%3u,%3u,%3u,%3u,%3u,%3u,%3u,%3u,%3u,%4u,%3u)\n",
		ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, wwu, age, cnc2, fce);
	if(CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, wwu, age, cnc2, fce) != a)
		printf("A is wrong\n");
}

int main(void)
{
	printf("qong: CS1 "); decode(0x00000A01, 0x20040501, 0x04020C00);
	printf("qong: CS3 "); decode(0x00004f00, 0x20013b31, 0x00020800);
	printf("tt01: CS4 "); decode(0x0000dcf6, 0x444A4541, 0x44443302);
	printf("pdk: CS5 ");  decode(0x0000d843, 0x22252521, 0x22220a00);
	printf("ads: CS0 "); decode(0x00000f00, 0x10000D03, 0x00720900);
	printf("phycore: CS0 "); decode(0x0000cf03, 0x10000d03, 0x00720900);
	printf("phycore: CS1 "); decode(0x0000df06, 0x444a4541, 0x44443302);
	printf("phycore: CS4 "); decode(0x0000d843, 0x22252521, 0x22220a00);

	printf("litekit: CS0 "); decode(0x0000cf03, 0xa0330d01, 0x00220800);
	printf("litekit: CS4 "); decode(0x0000dcf6, 0x444a4541, 0x44443302);
}
-------------------- cut --------------------




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Helmut Raiger Oct. 6, 2011, 1:07 p.m. UTC | #5 
Hi Stefano,

>> +include $(TOPDIR)/config.mk
>> +
>> +LIB	= $(obj)lib$(BOARD).o
>> +
>> +COBJS	:= tt01.o
>> +# reuse the mx31pdk low-level setup
>> +SOBJS	:= ../../freescale/mx31pdk/lowlevel_init.o
> It is always a good idea to reuse code, but taking it to another board
> seems hackish. Your board could become broken if the mx31pdk's
> maintainer change his code.
>
> Reading this file I do not see (except setting the AIPS) no good reason
> to write this part in assembly. Everything can be done for example in
> board_early_init_f, and even better we can rationalize this code and put
> it into arch/cpu/arm1136/mx31.

As far as I understood this is called from arch/arm/cpu/arm1136/start.S
before stack is setup. I don't know much about C-calling convention
on the arm1136, but this might be the reason why it's done in assembly.
I'd rather not touch start.S, so I'll copy the file over from mx31pdk?

>> +#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 10*1024*1024)
> 10 MB for heap in bootloader ? Is it ok ? I am only asking if it is
> really wanted.

We are about to display large compressed bitmaps in u-boot, that's why
the heap is that large. The frame buffer driver patch
http://patchwork.ozlabs.org/patch/113341/ is still being reviewed,
that is why I left it out here (but kept the heap size).
Additionally I don't care much about time and space here. The production
units will boot from NAND and we'll use a different setup there.
That's why I reserved 1MB for u-boot, I simply didn't want it to overwrite
my environment when being reprogrammed.

>> +#define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
>> +#define CONFIG_FLASH_CFI_DRIVER		/* Use drivers/cfi_flash.c */
>> +#define CONFIG_FLASH_SPANSION_S29WS_N
>> +/* TODO: bluetechnix did undefine these for some purpose
> if you do not need to undefine, you can drop this comment. Maybe there
> is no issues with lock/unlock mechanism with the flash you have chosen.

Bluetechnix is the supplier of the SOM we are using. Their original
version of u-boot (1.2 or so) defined these values. So the flash is
definitely the same. I'd like to review this later, therefore the TODO.

>> +#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
>> +#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
> Regarding your previous comment: you could set CONFIG_ENV_SIZE to a
> smaller value as CONFIG_ENV_SECT_SIZE, and this can speed up get/set of
> the environment. Or you could save the environment in tha last (smaller)
> sectors.
>
I'll look into the speed change, but as described above I don't
really care about size.
>> + * on TT-01 UART1 pins are used by Audio, so we use UART2
>> + *   make sure that the transceiver is enabled during PL=1 for testing!
> What does it mean PL=1 ?
>
Nothing that concerns u-boot, it means P(ower)L(evel)=1. The TT-01
implements a hardware that turns off components depending on
the said power level. In PL=1 the RS232 transceiver is usually off.

>> +/* this is currently not supported, mxc_nand.c is too incomplete for it */
> Only for my understanding: Which is the issue with mxc_nand.c ? At the
> moment, we have several boards using it, and I wonder it is incomplete.
> What do you mean ?

Part of this whole mess is, that I actually wrote this board support 2
years ago and simply rebased to finally contribute the stuff. Probably
there is no issue with mxc_nand.c any more (and I don't remember
what was the problem).

Thanks for your thorough review, I'll pass along V2 when we come
to a solution about low_level.S

Helmut


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Stefano Babic Oct. 6, 2011, 1:27 p.m. UTC | #6 
On 10/06/2011 03:07 PM, Helmut Raiger wrote:
> Hi Stefano,
> 

Hi Helmut,

>>
>> Reading this file I do not see (except setting the AIPS) no good reason
>> to write this part in assembly. Everything can be done for example in
>> board_early_init_f, and even better we can rationalize this code and put
>> it into arch/cpu/arm1136/mx31.
> 
> As far as I understood this is called from arch/arm/cpu/arm1136/start.S
> before stack is setup. I don't know much about C-calling convention
> on the arm1136, but this might be the reason why it's done in assembly.
> I'd rather not touch start.S, so I'll copy the file over from mx31pdk?

A way I used in the past is to set up the stack in the lowlevel_init
assembly routine and then calling my own C function. Again, probably is
not needed anymore, but you can check this.

The assembly start.S ends calling board_init_f(), and this runs before
relocation. At this point, the stack pointer is already set. The
board_init_f() then calls board_early_init_f(), if
CONFIG_BOARD_EARLY_INIT_F is set, and you can add your specific
initialization here.

You can take a look at the patches I sent last month for the flea3
board. I factorized code for the mx35. I know, this does not help for
mx31, but it is very similar and both arm1136. I have not touched
start.S from the arm1136 drirectory(this is general code), and the DRAM
setup is done in C code.

> We are about to display large compressed bitmaps in u-boot, that's why
> the heap is that large. The frame buffer driver patch
> http://patchwork.ozlabs.org/patch/113341/ is still being reviewed,
> that is why I left it out here (but kept the heap size).

Ok, agreed.

> Additionally I don't care much about time and space here. The production
> units will boot from NAND and we'll use a different setup there.
> That's why I reserved 1MB for u-boot, I simply didn't want it to overwrite
> my environment when being reprogrammed.

Ok, understood, thanks for clarification.

> 
>>> +#define CONFIG_SYS_FLASH_CFI        /* Flash memory is CFI compliant */
>>> +#define CONFIG_FLASH_CFI_DRIVER        /* Use drivers/cfi_flash.c */
>>> +#define CONFIG_FLASH_SPANSION_S29WS_N
>>> +/* TODO: bluetechnix did undefine these for some purpose
>> if you do not need to undefine, you can drop this comment. Maybe there
>> is no issues with lock/unlock mechanism with the flash you have chosen.
> 
> Bluetechnix is the supplier of the SOM we are using. Their original
> version of u-boot (1.2 or so) defined these values. So the flash is
> definitely the same. I'd like to review this later, therefore the TODO.

Ok, thanks. Probably it is worth you add this explanation to the
comment, so nobody will ask you again ;-)

>>> + * on TT-01 UART1 pins are used by Audio, so we use UART2
>>> + *   make sure that the transceiver is enabled during PL=1 for testing!
>> What does it mean PL=1 ?
>>
> Nothing that concerns u-boot, it means P(ower)L(evel)=1. The TT-01
> implements a hardware that turns off components depending on
> the said power level. In PL=1 the RS232 transceiver is usually off.

Understood. Add simply these line to the comment, they complete the
explanation.

> 
>>> +/* this is currently not supported, mxc_nand.c is too incomplete for
>>> it */
>> Only for my understanding: Which is the issue with mxc_nand.c ? At the
>> moment, we have several boards using it, and I wonder it is incomplete.
>> What do you mean ?
> 
> Part of this whole mess is, that I actually wrote this board support 2
> years ago and simply rebased to finally contribute the stuff. Probably
> there is no issue with mxc_nand.c any more (and I don't remember
> what was the problem).

Ok. Probably you need only to retest NAND again, and check if there are
open issues.

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/Makefile b/Makefile
index e9ba6a4..aaed9e6 100644
--- a/Makefile
+++ b/Makefile
@@ -908,6 +908,10 @@  mx31pdk_nand_config	: unconfig
 	fi
 	@$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
 
+tt01_config : unconfig
+	@mkdir -p $(obj)include
+	@$(MKCONFIG) -n $@ -a tt01 arm arm1136 tt01 hale mx31
+
 #########################################################################
 ## ARM1176 Systems
 #########################################################################
diff --git a/board/hale/tt01/Makefile b/board/hale/tt01/Makefile
new file mode 100644
index 0000000..18c83bb
--- /dev/null
+++ b/board/hale/tt01/Makefile
@@ -0,0 +1,53 @@ 
+##
+# (C) Copyright 2009 HALE electronic <helmut.raiger@hale.at>
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= tt01.o
+# reuse the mx31pdk low-level setup
+SOBJS	:= ../../freescale/mx31pdk/lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/hale/tt01/config.mk b/board/hale/tt01/config.mk
new file mode 100644
index 0000000..a7887ba
--- /dev/null
+++ b/board/hale/tt01/config.mk
@@ -0,0 +1 @@ 
+CONFIG_SYS_TEXT_BASE = 0xa0000000
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
new file mode 100644
index 0000000..3bae2b4
--- /dev/null
+++ b/board/hale/tt01/tt01.c
@@ -0,0 +1,98 @@ 
+/*
+ * (C) Copyright 2011 HALE electronic <helmut.raiger@hale.at>
+ * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
+ * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <command.h>
+#include <asm/arch/clock.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BOARD_STRING	"Board: HALE TT-01"
+
+void tt01_spi3_hw_init(void)
+{
+	/* CSPI3 */
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_MISO, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_MOSI, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_SCLK, MUX_CTL_FUNC));
+    /* CSPI3, SS0 = Atlas */
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI2_SS0, MUX_CTL_ALT1));
+
+	/* start CSPI3 clock (3 = always on except if PLL off) */
+	writel(readl(CCM_CGR0) | (3 << 16), CCM_CGR0);
+}
+
+int dram_init(void)
+{
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE,
+			PHYS_SDRAM_1_SIZE);
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int board_early_init_f(void)
+{
+	/* CS4: FPGA incl. network controller */
+	__REG(CSCR_U(4)) = 0x0000dcf6;
+	__REG(CSCR_L(4)) = 0x444A4541;
+	__REG(CSCR_A(4)) = 0x44443302;
+
+	/* Setup UART2 and SPI3 pins */
+	mx31_uart2_hw_init();
+	tt01_spi3_hw_init();
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* board id for linux, not in mach-types.h yet */
+	gd->bd->bi_arch_number = 3726;		/* MACH_TYPE_TT01 = 3726 */
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+	return 0;
+}
+
+int checkboard(void)
+{
+	printf(BOARD_STRING "\n");
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+#ifdef CONFIG_SMC911X
+	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
+	return rc;
+}
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
new file mode 100644
index 0000000..22fb806
--- /dev/null
+++ b/include/configs/tt01.h
@@ -0,0 +1,283 @@ 
+/*
+ * (C) Copyright 2011 HALE electronic <helmut.raiger@hale.at>
+ * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
+ *
+ * Configuration settings for the HALE TT-01 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/imx-regs.h>
+
+/* High Level Configuration Options */
+#define CONFIG_ARM1136
+#define CONFIG_MX31
+#define CONFIG_MX31_HCLK_FREQ	26000000
+#define CONFIG_MX31_CLK32	32768
+
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map:
+ *   CS settings are defined by i.MX31:
+ *     - CSD0 and CDS1 are 256MB each, starting at 0x80000000 and 0x9000000
+ *     - CS0 and CS1 are 128MB each, at A0000000 and A8000000
+ *     - CS2 to CS5 are 32MB each, at B0.., B2.., B4.., B6..
+ *
+ * HALE set-up of the bluetechnix board for now is:
+ *   - 128MB DDR (2x64MB, 2x16bit), connected to 32bit DDR ram interface
+ *   - NOR-Flash (Spansion 32MB MCP, Flash+16MB PSRAM), 16bit interface at CS0
+ *		- S71WS256ND0BFWYM (and CS1 for 64MB S71WS512ND0 without PSRAM)
+ *        the flash chip is a mirrorbit S29WS256N !
+ *   - the PSRAM is hooked to CS5 (0xB6000000)
+ *   - Intel Strata Flash PF48F2000P0ZB00, 16bit interface at (CS0 or) CS1
+ *     - 64Mbit = 8MByte (will go away in the production set-up)
+ *   - NAND-Flash NAND01GR3B2BZA6 at NAND-FC:
+ *		1Gbit=128MB, 2048+64 bytes/page, 64pages x 1024 blocks
+ *   - Ethernet controller SMC9118 at CS4 via FPGA, 16bit interface
+ *
+ * u-boot will support the 32MB nor flash and the 128MB NAND flash, the PSRAM
+ * is not used right now. We should be able to reduce the SOM to NAND flash
+ * only and boot from there.
+ */
+#define CONFIG_NR_DRAM_BANKS	1
+#define PHYS_SDRAM_1		CSD0_BASE
+#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR	\
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
+
+/* default load address, 1MB up the road */
+#define CONFIG_SYS_LOAD_ADDR		(PHYS_SDRAM_1+0x100000)
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */
+
+/*
+ * Size of malloc() pool, make sure possible frame buffer fits
+ */
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 10*1024*1024)
+/* Bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+
+/* memtest works on all but the last 1MB (u-boot) and malloc area  */
+#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
+#define CONFIG_SYS_MEMTEST_END \
+	(PHYS_SDRAM_1+(PHYS_SDRAM_1_SIZE-CONFIG_SYS_MALLOC_LEN-0x100000))
+
+/*-----------------------------------------------------------------------
+ * CFI FLASH driver setup
+ */
+#define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
+#define CONFIG_FLASH_CFI_DRIVER		/* Use drivers/cfi_flash.c */
+#define CONFIG_FLASH_SPANSION_S29WS_N
+/* TODO: bluetechnix did undefine these for some purpose
+ * #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+ * #define CONFIG_SYS_FLASH_PROTECTION
+ */
+#define CONFIG_SYS_FLASH_BASE		CS0_BASE
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT (254+8) /* max number of sectors per chip */
+
+/*---------------------------------------------------------------------------
+ * FLASH and environment organization, only the Spansion chip is supported:
+ * - it has 254 * 128kB + 8 * 32kB blocks
+ * - this setup uses 4*32k+128k as monitor space = 0xA000 0000 to 0xA003 FFFF
+ *		and as environment 2 sections with 128k =
+ *		A004 0000 to 0xA005 FFFF and 0xA006 0000 to 0xA007 FFFF
+ * - this could be less, but no-one is going to use the NOR flash anyway.
+ *
+ * Monitor is at the beginning of the NOR-Flash, 1MB reserved
+ */
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_MONITOR_LEN		(1024 * 1024)
+
+#define	CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
+#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
+
+/* Address and size of Redundant Environment Sector	*/
+#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
+
+/* S29WS256N (inside S71WS256ND0) has 4 32KiB small sectors at both ends. */
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
+
+/* Hardware drivers */
+
+/*
+ * on TT-01 UART1 pins are used by Audio, so we use UART2
+ *   make sure that the transceiver is enabled during PL=1 for testing!
+ */
+#define CONFIG_MXC_UART
+#define CONFIG_SYS_MX31_UART2
+
+#define CONFIG_MXC_SPI
+#define CONFIG_MXC_GPIO
+
+/* MC13783 connected to CSPI3 and SS0 */
+#define CONFIG_FSL_PMIC
+#define CONFIG_FSL_PMIC_BUS		2
+#define CONFIG_FSL_PMIC_CS		0
+#define CONFIG_FSL_PMIC_CLK		1000000
+#define CONFIG_FSL_PMIC_MODE	(SPI_MODE_0 | SPI_CS_HIGH)
+
+#define CONFIG_RTC_MC13783
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+/* console is UART2 on TT-01 */
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
+
+/* ethernet setup for the onboard smc9118 */
+#define CONFIG_NET_MULTI
+#define CONFIG_MII
+#define CONFIG_SMC911X
+/* 16 bit, onboard ethernet, decoded via MACH-MX0 FPGA at 0x84200000 */
+#define CONFIG_SMC911X_BASE		(CS4_BASE+0x200000)
+#define CONFIG_SMC911X_16_BIT
+
+/***********************************************************
+ * Command definition
+ ***********************************************************/
+
+#include <config_cmd_default.h>
+
+/* this is currently not supported, mxc_nand.c is too incomplete for it */
+#undef CONFIG_CMD_MTDPARTS
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_NAND
+/* #define CONFIG_CMD_NAND_LOCK_UNLOCK the NAND01... chip does not support
+ * the NAND_CMD_LOCK_STATUS command, however the NFC of i.MX31 supports
+ * a software locking scheme.
+ */
+
+#define CONFIG_BOOTDELAY	3
+
+/* currently a default setting for booting via script is implemented
+ *   set user to login name and serverip to tftp host, define your
+ *   boot behaviour in bootscript.loginname
+ */
+#define	CONFIG_EXTRA_ENV_SETTINGS \
+	"bootcmd=dhcp bootscript.$(user); source\0"
+
+#define CONFIG_BOOTP_SERVERIP /* tftp serverip not overruled by dhcp server */
+#define CONFIG_BOOTP_SEND_HOSTNAME /* if env-var 'hostname' is set, send it */
+
+/*
+ * Miscellaneous configurable options
+ */
+/* hush adds about 1kB in size */
+#define CONFIG_HUSH_PARSER
+#define CONFIG_PROMPT_HUSH_PS2	"> "
+
+#define CONFIG_SYS_LONGHELP			/* undef to save memory */
+#define CONFIG_SYS_PROMPT	"TT01> "
+#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
+				sizeof(CONFIG_SYS_PROMPT)+16)
+/* max number of command args */
+#define CONFIG_SYS_MAXARGS	16
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_HZ			1000
+
+#define CONFIG_CMDLINE_EDITING
+
+#define CONFIG_NAND_MXC
+#define CONFIG_SYS_MAX_NAND_DEVICE		1
+#define CONFIG_SYS_NAND_MAX_CHIPS		1
+
+/* actually this is nothing someone wants to configure!
+ * CONFIG_SYS_NAND_BASE despite being passed to board_nand_init()
+ * is not used by the driver.
+ */
+#define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR
+#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR
+#define CONFIG_MXC_NAND_HWECC
+
+/* the current u-boot driver does not use the nand flash setup! */
+#define CONFIG_SYS_NAND_LARGEPAGE
+/* it's not 16 bit:
+ * #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+ *    the current u-boot mxc_nand.c tries to auto-detect, but this only
+ *    reads the reset
+ */
+
+/* Configuration of lowlevel_init.S (clocks and SDRAM) */
+#define CCM_CCMR_SETUP		0x074B0BF5
+#define CCM_PDR0_SETUP_532MHZ	(PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) | \
+				 PDR0_HSP_PODF(3) | PDR0_NFC_PODF(5) |     \
+				 PDR0_IPG_PODF(1) | PDR0_MAX_PODF(3) |     \
+				 PDR0_MCU_PODF(0))
+#define CCM_MPCTL_SETUP_532MHZ	(PLL_PD(0) | PLL_MFD(51) | PLL_MFI(10) |   \
+				 PLL_MFN(12))
+
+#define ESDMISC_MDDR_SETUP	0x00000004
+#define ESDMISC_MDDR_RESET_DL	0x0000000c
+/* decoding magic 0x6ac73a = 0b 0110 1010   1100 0111   0011 1010 below:
+ *   tXP = 11, tWTR = 0, tRP = 10, tMRD = 10
+ *   tWR = 1, tRAS = 100, tRRD = 01, tCAS = 11
+ *   tRCD = 011, tRC = 010
+ *  note: all but tWTR (1), tRC (111) are reset defaults,
+ *     the same values work in the jtag configuration
+ *
+ *  bluetechnix setup has 0x75e73a (for 128MB) =
+ *			0b 0111 0101   1110 0111   0011 1010
+ *   tXP = 11, tWTR = 1, tRP = 01, tMRD = 01
+ *   tWR = 1, tRAS = 110, tRRD = 01, tCAS = 11
+ *   tRCD = 011, tRC = 010
+ */
+#define ESDCFG0_MDDR_SETUP	0x006ac73a
+#define ESDCTL_ROW_COL		(ESDCTL_SDE | ESDCTL_ROW(2) | ESDCTL_COL(2))
+#define ESDCTL_SETTINGS		(ESDCTL_ROW_COL | ESDCTL_SREFR(3) | \
+				 ESDCTL_DSIZ(2) | ESDCTL_BL(1))
+#define ESDCTL_PRECHARGE	(ESDCTL_ROW_COL | ESDCTL_CMD_PRECHARGE)
+#define ESDCTL_AUTOREFRESH	(ESDCTL_ROW_COL | ESDCTL_CMD_AUTOREFRESH)
+#define ESDCTL_LOADMODEREG	(ESDCTL_ROW_COL | ESDCTL_CMD_LOADMODEREG)
+#define ESDCTL_RW		ESDCTL_SETTINGS
+
+#endif /* __CONFIG_H */