From patchwork Sat Sep 17 16:13:02 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: nagabhushana.netagunte@ti.com X-Patchwork-Id: 115132 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id AA7ADB6F93 for ; Sun, 18 Sep 2011 02:13:26 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D8686282D7; Sat, 17 Sep 2011 18:13:22 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id uufRy-ogZREB; Sat, 17 Sep 2011 18:13:22 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ACA0628305; Sat, 17 Sep 2011 18:13:18 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 312C4282F4 for ; Sat, 17 Sep 2011 18:13:16 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CNlXv1GqoRgc for ; Sat, 17 Sep 2011 18:13:14 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by theia.denx.de (Postfix) with ESMTPS id 33FE5282DF for ; Sat, 17 Sep 2011 18:13:12 +0200 (CEST) Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id p8HGD7e9017437 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Sat, 17 Sep 2011 11:13:10 -0500 Received: from dbde71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p8HGD64k004834 for ; Sat, 17 Sep 2011 21:43:07 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 8.3.106.1; Sat, 17 Sep 2011 21:43:07 +0530 Received: from psplinux051.india.ti.com (psplinux051.india.ti.com [172.24.162.244]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p8HGD5qj004163; Sat, 17 Sep 2011 21:43:06 +0530 (IST) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by psplinux051.india.ti.com (8.13.1/8.13.1) with ESMTP id p8HGD5Yd011657; Sat, 17 Sep 2011 21:43:05 +0530 Received: (from x0144960@localhost) by psplinux051.india.ti.com (8.13.1/8.13.1/Submit) id p8HGD5V4011654; Sat, 17 Sep 2011 21:43:05 +0530 From: To: Date: Sat, 17 Sep 2011 21:43:02 +0530 Message-ID: <1316275984-11586-4-git-send-email-nagabhushana.netagunte@ti.com> X-Mailer: git-send-email 1.6.2.4 In-Reply-To: <1316275984-11586-1-git-send-email-nagabhushana.netagunte@ti.com> References: <1316275984-11586-1-git-send-email-nagabhushana.netagunte@ti.com> MIME-Version: 1.0 Cc: sudhakar.raj@ti.com, manjunath.hadli@ti.com Subject: [U-Boot] [PATCH 3/5] davinci: add clocks command X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Nagabhushana Netagunte add 'clocks' command to print various clock frequency info found in SOC such as ARM core frequency, DSP core frequency and DDR frequency. Signed-off-by: Nagabhushana Netagunte --- arch/arm/cpu/arm926ejs/davinci/speed.c | 26 ++++++++++++++++++-------- 1 files changed, 18 insertions(+), 8 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/davinci/speed.c b/arch/arm/cpu/arm926ejs/davinci/speed.c index 7d2a6bd..ebcd212 100644 --- a/arch/arm/cpu/arm926ejs/davinci/speed.c +++ b/arch/arm/cpu/arm926ejs/davinci/speed.c @@ -20,9 +20,11 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ - +#include +#include #include #include +#include /* offsets from PLL controller base */ #define PLLC_PLLCTL 0x100 @@ -166,7 +168,15 @@ static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned div) return DIV_ROUND_UP(base, 1000 * pll_div(pllbase, div)); } -int print_cpuinfo(void) +#ifdef DAVINCI_DM6467EVM +unsigned int davinci_arm_clk_get() +{ + return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV) * 1000000; +} +#endif + +int showclocks(cmd_tbl_t *cmdtp, + int flag, int argc, char * const argv[]) { /* REVISIT fetch and display CPU ID and revision information * too ... that will matter as more revisions appear. @@ -184,11 +194,11 @@ int print_cpuinfo(void) pll_sysclk_mhz(DAVINCI_PLL_CNTRL1_BASE, DDR_PLLDIV) / 2); return 0; -} -#ifdef DAVINCI_DM6467EVM -unsigned int davinci_arm_clk_get() -{ - return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV) * 1000000; } -#endif + +U_BOOT_CMD( + clocks, 1, 0, showclocks, + "display clocks", + "" +);