From patchwork Wed Aug 31 08:35:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 112466 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3F8F6B6F7B for ; Wed, 31 Aug 2011 18:37:23 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EC65E280F5; Wed, 31 Aug 2011 10:36:43 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bnGbujLLWtl9; Wed, 31 Aug 2011 10:36:43 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 08606280F6; Wed, 31 Aug 2011 10:36:09 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5FE02280AD for ; Wed, 31 Aug 2011 10:35:48 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bW7Wcrsb9yfX for ; Wed, 31 Aug 2011 10:35:46 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-bw0-f44.google.com (mail-bw0-f44.google.com [209.85.214.44]) by theia.denx.de (Postfix) with ESMTPS id 56752280C1 for ; Wed, 31 Aug 2011 10:35:39 +0200 (CEST) Received: by mail-bw0-f44.google.com with SMTP id r4so505492bka.3 for ; Wed, 31 Aug 2011 01:35:39 -0700 (PDT) Received: by 10.204.141.21 with SMTP id k21mr86961bku.342.1314779739116; Wed, 31 Aug 2011 01:35:39 -0700 (PDT) Received: from localhost ([178.23.216.97]) by mx.google.com with ESMTPS id zz10sm264214bkb.28.2011.08.31.01.35.38 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 31 Aug 2011 01:35:38 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de Date: Wed, 31 Aug 2011 10:35:21 +0200 Message-Id: <1314779721-1113-11-git-send-email-monstr@monstr.eu> X-Mailer: git-send-email 1.5.5.1 In-Reply-To: <1314779721-1113-10-git-send-email-monstr@monstr.eu> References: <1314779721-1113-1-git-send-email-monstr@monstr.eu> <1314779721-1113-2-git-send-email-monstr@monstr.eu> <1314779721-1113-3-git-send-email-monstr@monstr.eu> <1314779721-1113-4-git-send-email-monstr@monstr.eu> <1314779721-1113-5-git-send-email-monstr@monstr.eu> <1314779721-1113-6-git-send-email-monstr@monstr.eu> <1314779721-1113-7-git-send-email-monstr@monstr.eu> <1314779721-1113-8-git-send-email-monstr@monstr.eu> <1314779721-1113-9-git-send-email-monstr@monstr.eu> <1314779721-1113-10-git-send-email-monstr@monstr.eu> Subject: [U-Boot] [PATCH 10/10] microblaze: Clean up reset asm code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de - Remove code copying - Reset address is setup from first stage bootloader - Support reset vector setup on little endian Signed-off-by: Michal Simek --- arch/microblaze/cpu/start.S | 25 +++++-------------------- 1 files changed, 5 insertions(+), 20 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 97dd757..492ad93 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -66,26 +66,11 @@ _start: addik r6, r0, CONFIG_SYS_RESET_ADDRESS sw r6, r1, r0 - lhu r7, r1, r0 - shi r7, r0, 0x2 - shi r6, r0, 0x6 -/* - * Copy U-Boot code to CONFIG_SYS_TEXT_BASE - * solve problem with sbrk_base - */ -#if (CONFIG_SYS_RESET_ADDRESS != CONFIG_SYS_TEXT_BASE) - addi r4, r0, __end - addi r5, r0, __text_start - rsub r4, r5, r4 /* size = __end - __text_start */ - addi r6, r0, CONFIG_SYS_RESET_ADDRESS /* source address */ - addi r7, r0, 0 /* counter */ -4: - lw r8, r6, r7 - sw r8, r5, r7 - addi r7, r7, 0x4 - cmp r8, r4, r7 - blti r8, 4b -#endif + lhu r7, r1, r10 + rsubi r8, r10, 0x2 + sh r7, r0, r8 + rsubi r8, r10, 0x6 + sh r6, r0, r8 #endif #ifdef CONFIG_SYS_USR_EXCEP