From patchwork Mon Jul 25 18:05:35 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Schwarz X-Patchwork-Id: 106729 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 55FADB70BD for ; Tue, 26 Jul 2011 04:07:41 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BEBA52809E; Mon, 25 Jul 2011 20:07:39 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VPqpece+H7HL; Mon, 25 Jul 2011 20:07:39 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B77ED28091; Mon, 25 Jul 2011 20:07:37 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 184492808D for ; Mon, 25 Jul 2011 20:07:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3Hr233zeCrO4 for ; Mon, 25 Jul 2011 20:07:35 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-fx0-f50.google.com (mail-fx0-f50.google.com [209.85.161.50]) by theia.denx.de (Postfix) with ESMTPS id C3B812809A for ; Mon, 25 Jul 2011 20:07:33 +0200 (CEST) Received: by mail-fx0-f50.google.com with SMTP id 2so6070609fxh.23 for ; Mon, 25 Jul 2011 11:07:33 -0700 (PDT) Received: by 10.223.61.133 with SMTP id t5mr324186fah.130.1311617253609; Mon, 25 Jul 2011 11:07:33 -0700 (PDT) Received: from localhost.localdomain (DSL01.212.114.252.242.ip-pool.NEFkom.net [212.114.252.242]) by mx.google.com with ESMTPS id o17sm3929945fal.2.2011.07.25.11.07.32 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 25 Jul 2011 11:07:32 -0700 (PDT) From: Simon Schwarz To: u-boot@lists.denx.de, simonschwarzcor@gmail.com Date: Mon, 25 Jul 2011 20:05:35 +0200 Message-Id: <1311617138-17041-3-git-send-email-simonschwarzcor@gmail.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1311617138-17041-1-git-send-email-simonschwarzcor@gmail.com> References: <1309270480-31918-1-git-send-email-schwarz@corscience.de> <1311617138-17041-1-git-send-email-simonschwarzcor@gmail.com> Organization: Corscience GmbH & Co. KG Cc: mporter@ti.com, albert.u.boot@aribaud.net Subject: [U-Boot] [PATCH V2 2/5] omap-common: add nand spl support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add NAND support for the new SPL structure. --- This patch didn't exist before V2! V2 changes: ADD Some define-barriers for OMAP3 to only use NAND ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the header CHG cosmetic ADD do_reset() implementation for omap-common spl ADD nand_copy_image to nand.h ADD CPP barriers for mmc and nand support. The parts depending on library support are only compiled if the respective library is included. Transition from V1 to V2 also includes that this patch is now based on - the new SPL layout by Aneesh V and Daniel Schwierzeck - the OMAP4 SPL patches by Aneesh V Signed-off-by: Simon Schwarz --- arch/arm/cpu/armv7/omap-common/spl.c | 43 ++++++++++++++++++++++++++++++++++ arch/arm/include/asm/omap_common.h | 2 + include/nand.h | 3 ++ 3 files changed, 48 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c index d177652..3a0093d 100644 --- a/arch/arm/cpu/armv7/omap-common/spl.c +++ b/arch/arm/cpu/armv7/omap-common/spl.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header) } } +#ifdef CONFIG_SPL_MMC_SUPPORT static void mmc_load_image_raw(struct mmc *mmc) { u32 image_size_sectors, err; @@ -140,7 +142,9 @@ end: hang(); } } +#endif /* CONFIG_SPL_MMC_SUPPORT */ +#ifdef CONFIG_SPL_MMC_SUPPORT static void mmc_load_image_fat(struct mmc *mmc) { s32 err; @@ -173,7 +177,9 @@ end: hang(); } } +#endif /* CONFIG_SPL_MMC_SUPPORT */ +#ifdef CONFIG_SPL_MMC_SUPPORT static void mmc_load_image(void) { struct mmc *mmc; @@ -206,6 +212,26 @@ static void mmc_load_image(void) hang(); } } +#endif /* CONFIG_SPL_MMC_SUPPORT */ + +#ifdef CONFIG_SPL_NAND_SUPPORT +static void nand_load_image(void) +{ + gpmc_init(); + nand_init(); + nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST); +#ifdef CONFIG_NAND_ENV_DST + nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_NAND_ENV_DST); +#ifdef CONFIG_ENV_OFFSET_REDUND + nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE, + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE); +#endif +#endif + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST); +} +#endif /* CONFIG_SPL_NAND_SUPPORT */ void jump_to_image_no_args(void) { @@ -228,10 +254,17 @@ void board_init_r(gd_t *id, ulong dummy) boot_device = omap_boot_device(); debug("boot device - %d\n", boot_device); switch (boot_device) { +#ifdef CONFIG_SPL_MMC_SUPPORT case BOOT_DEVICE_MMC1: case BOOT_DEVICE_MMC2: mmc_load_image(); break; +#endif +#ifdef CONFIG_SPL_NAND_SUPPORT + case BOOT_DEVICE_NAND: + nand_load_image(); + break; +#endif default: printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device); hang(); @@ -259,7 +292,9 @@ void preloader_console_init(void) gd->flags |= GD_FLG_RELOC; gd->baudrate = CONFIG_BAUDRATE; +#ifndef CONFIG_OMAP34XX setup_clocks_for_console(); +#endif serial_init(); /* serial communications setup */ /* Avoid a second "U-Boot" coming from this string */ @@ -270,3 +305,11 @@ void preloader_console_init(void) omap_rev_string(rev_string_buffer); printf("Texas Instruments %s\n", rev_string_buffer); } + +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + debug("resetting cpu..."); + reset_cpu(0); + + return 0; +} diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index d3cb857..ee45a33 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -49,6 +49,8 @@ void preloader_console_init(void); #define MMCSD_MODE_UNDEFINED 0 #define MMCSD_MODE_RAW 1 #define MMCSD_MODE_FAT 2 +#define NAND_MODE_HW 3 +#define NAND_MODE_SW 4 u32 omap_boot_device(void); u32 omap_boot_mode(void); diff --git a/include/nand.h b/include/nand.h index 8d94b5c..084c017 100644 --- a/include/nand.h +++ b/include/nand.h @@ -132,6 +132,8 @@ int nand_lock( nand_info_t *meminfo, int tight ); int nand_unlock( nand_info_t *meminfo, ulong start, ulong length ); int nand_get_lock_status(nand_info_t *meminfo, loff_t offset); +void nand_copy_image(unsigned int offs, unsigned int size, uchar *dst); + #ifdef CONFIG_SYS_NAND_SELECT_DEVICE void board_nand_select_device(struct nand_chip *nand, int chip); #endif @@ -148,3 +150,4 @@ __attribute__((noreturn)) void nand_boot(void); #define ENV_OFFSET_SIZE 8 int get_nand_env_oob(nand_info_t *nand, unsigned long *result); #endif +