From patchwork Thu Jul 21 05:39:54 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajay Bhargav X-Patchwork-Id: 105927 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 730A5B6F7F for ; Thu, 21 Jul 2011 15:40:35 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BA8FA2831C; Thu, 21 Jul 2011 07:40:32 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1AIK2d4FD8YO; Thu, 21 Jul 2011 07:40:32 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 82DBC28310; Thu, 21 Jul 2011 07:40:31 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0551C28311 for ; Thu, 21 Jul 2011 07:40:25 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CQs-nr+3-6V0 for ; Thu, 21 Jul 2011 07:40:22 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from ahm.einfochips.com (ahm.einfochips.com [203.88.139.151]) by theia.denx.de (Postfix) with ESMTP id 0BD9A2830F for ; Thu, 21 Jul 2011 07:40:20 +0200 (CEST) Received: from localhost (localhost.localdomain [127.0.0.1]) by ahm.einfochips.com (Postfix) with ESMTP id 97FE9A608093; Thu, 21 Jul 2011 11:00:39 +0530 (IST) X-Virus-Scanned: amavisd-new at einfochips.com Received: from ahm.einfochips.com ([127.0.0.1]) by localhost (ahm.einfochips.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id RcYFxSE84GMS; Thu, 21 Jul 2011 11:00:39 +0530 (IST) Received: from localhost.localdomain (unknown [192.168.9.91]) by ahm.einfochips.com (Postfix) with ESMTPA id 81D5BA608012; Thu, 21 Jul 2011 11:00:39 +0530 (IST) From: Ajay Bhargav To: prafulla@marvell.com Date: Thu, 21 Jul 2011 11:09:54 +0530 Message-Id: <1311226795-24486-1-git-send-email-ajay.bhargav@einfochips.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: Cc: u-boot@lists.denx.de, Ajay Bhargav Subject: [U-Boot] [PATCH 1/2] gpio: Add GPIO driver framework for Marvell SoCs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch adds generic GPIO driver framework support for Marvell SoCs. To enable GPIO driver define CONFIG_MV_GPIO and for GPIO commands define CONFIG_CMD_GPIO in your board configuration file. Signed-off-by: Ajay Bhargav --- drivers/gpio/Makefile | 1 + drivers/gpio/mvgpio.c | 125 +++++++++++++++++++++++++++++++++++++++++++++++++ include/mvgpio.h | 52 ++++++++++++++++++++ 3 files changed, 178 insertions(+), 0 deletions(-) create mode 100644 drivers/gpio/mvgpio.c create mode 100644 include/mvgpio.h diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 62ec97d..c6f652f 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -28,6 +28,7 @@ LIB := $(obj)libgpio.o COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o COBJS-$(CONFIG_MARVELL_MFP) += mvmfp.o +COBJS-$(CONFIG_MV_GPIO) += mvgpio.o COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c new file mode 100644 index 0000000..d64f0db --- /dev/null +++ b/drivers/gpio/mvgpio.c @@ -0,0 +1,125 @@ +/* + * (C) Copyright 2011 + * eInfochips Ltd. + * Written-by: Ajay Bhargav + * + * (C) Copyright 2010 + * Marvell Semiconductor + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include +#include +#include +#include + +char gpio_names[MV_MAX_GPIO][GPIO_LABEL_MAX]; + +static int get_gpio_base(int bank) +{ + switch (bank) { + case 0: + return GPIO_BANK0_BASE; + case 1: + return GPIO_BANK1_BASE; + case 2: + return GPIO_BANK2_BASE; + case 3: + return GPIO_BANK3_BASE; + } + return 0; +} + +int gpio_request(int gp, const char *label) +{ + if (gp >= MV_MAX_GPIO) + return -EINVAL; + + if (strlen(gpio_names[gp]) == 0) { + strncpy(gpio_names[gp], label, GPIO_LABEL_MAX); + gpio_names[gp][GPIO_LABEL_MAX - 1] = '\0'; + } else { + return -EBUSY; + } + return 0; +} + +void gpio_free(int gp) +{ + gpio_names[gp][0] = '\0'; +} + +void gpio_toggle_value(int gp) +{ + gpio_set_value(gp, !gpio_get_value(gp)); +} + +int gpio_direction_input(int gp) +{ + struct gpio_reg *gpio_reg_bank; + + if (gp >= MV_MAX_GPIO) + return -EINVAL; + + gpio_reg_bank = (struct gpio_reg *) get_gpio_base(GPIO_TO_REG(gp)); + writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gcdr); + return 0; +} + +int gpio_direction_output(int gp, int value) +{ + struct gpio_reg *gpio_reg_bank; + + if (gp >= MV_MAX_GPIO) + return -EINVAL; + + gpio_reg_bank = (struct gpio_reg *) get_gpio_base(GPIO_TO_REG(gp)); + writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gsdr); + gpio_set_value(gp, value); + return 0; +} + +int gpio_get_value(int gp) +{ + struct gpio_reg *gpio_reg_bank; + u32 gp_val; + + if (gp >= MV_MAX_GPIO) + return -EINVAL; + + gpio_reg_bank = (struct gpio_reg *) get_gpio_base(GPIO_TO_REG(gp)); + gp_val = readl(&gpio_reg_bank->gplr); + + return GPIO_VAL(gp, gp_val); +} + +void gpio_set_value(int gp, int value) +{ + struct gpio_reg *gpio_reg_bank; + + if (gp >= MV_MAX_GPIO) + return; + + gpio_reg_bank = (struct gpio_reg *) get_gpio_base(GPIO_TO_REG(gp)); + if (value) + writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gpsr); + else + writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gpcr); +} diff --git a/include/mvgpio.h b/include/mvgpio.h new file mode 100644 index 0000000..7d0258f --- /dev/null +++ b/include/mvgpio.h @@ -0,0 +1,52 @@ +/* + * (C) Copyright 2011 + * eInfochips Ltd. + * Written-by: Ajay Bhargav + * + * (C) Copyright 2010 + * Marvell Semiconductor + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _MV_GPIO_H +#define _MV_GPIO_H + +#include + +#if defined(CONFIG_MV_GPIO) + +#define MV_GPIO_BASE 0xD4019000 +#define GPIO_BANK0_BASE (MV_GPIO_BASE + 0x0000) +#define GPIO_BANK1_BASE (MV_GPIO_BASE + 0x0004) +#define GPIO_BANK2_BASE (MV_GPIO_BASE + 0x0008) +#define GPIO_BANK3_BASE (MV_GPIO_BASE + 0x0100) + +#define GPIO_LABEL_MAX 20 +#define MV_MAX_GPIO 128 + +#define GPIO_TO_REG(gp) (gp >> 5) +#define GPIO_TO_BIT(gp) (1 << (gp & 0x1F)) +#define GPIO_VAL(gp, val) ((val >> (gp & 0x1F)) & 0x01) + +#define GPIO_SET 1 +#define GPIO_CLR 0 + +#endif /* CONFIG_MV_GPIO */ +#endif /* _MV_GPIO_H */