From patchwork Thu Jun 30 19:55:08 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anton staaf X-Patchwork-Id: 102826 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 7967FB6EE9 for ; Fri, 1 Jul 2011 05:55:51 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AE8ED2813D; Thu, 30 Jun 2011 21:55:45 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8PePDe7DqFTY; Thu, 30 Jun 2011 21:55:45 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D68402813E; Thu, 30 Jun 2011 21:55:41 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 378EF280CF for ; Thu, 30 Jun 2011 21:55:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id mTZRC+riW7Eu for ; Thu, 30 Jun 2011 21:55:34 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtp-out.google.com (smtp-out.google.com [216.239.44.51]) by theia.denx.de (Postfix) with ESMTPS id B1853280CC for ; Thu, 30 Jun 2011 21:55:31 +0200 (CEST) Received: from hpaq12.eem.corp.google.com (hpaq12.eem.corp.google.com [172.25.149.12]) by smtp-out.google.com with ESMTP id p5UJtNCX002543; Thu, 30 Jun 2011 12:55:23 -0700 Received: from servo.mtv.corp.google.com (servo.mtv.corp.google.com [172.22.72.56]) by hpaq12.eem.corp.google.com with ESMTP id p5UJtGec005679; Thu, 30 Jun 2011 12:55:17 -0700 Received: by servo.mtv.corp.google.com (Postfix, from userid 99248) id AC55313A1E4; Thu, 30 Jun 2011 12:55:16 -0700 (PDT) From: Anton Staaf To: u-boot@lists.denx.de Date: Thu, 30 Jun 2011 12:55:08 -0700 Message-Id: <1309463708-3829-2-git-send-email-robotboy@chromium.org> X-Mailer: git-send-email 1.7.3.1 In-Reply-To: <1309463708-3829-1-git-send-email-robotboy@chromium.org> References: <1309463708-3829-1-git-send-email-robotboy@chromium.org> X-System-Of-Record: true Cc: Jaehoon Chung , Minkyu Kang , Anton Staaf Subject: [U-Boot] [PATCH 1/1] mmc: S5P: Support DMA restarts at buffer boundaries X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Currently if a DMA buffer straddles a buffer alignment boundary (512KiB) then the DMA engine will pause and generate a DMA interrupt. Since the DMA interrupt is not enabled it will hang the MMC driver. This patch adds support for restarting the DMA transfer. The SYSTEM_ADDRESS register contains the next address that would have been read/written when a boundary is hit. So we can read that and write it back. The write triggers the resumption of the transfer. Signed-off-by: Anton Staaf Cc: Minkyu Kang Cc: Jaehoon Chung Cc: Albert ARIBAUD --- drivers/mmc/s5p_mmc.c | 15 +++++++++++---- 1 files changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/s5p_mmc.c b/drivers/mmc/s5p_mmc.c index 280738f..62a7abf 100644 --- a/drivers/mmc/s5p_mmc.c +++ b/drivers/mmc/s5p_mmc.c @@ -232,9 +232,15 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, __func__, mask); return -1; } else if (mask & (1 << 3)) { - /* DMA Interrupt */ + /* + * DMA Interrupt, restart the transfer where + * it was interrupted. + */ + unsigned int address = readl(&host->reg->sysad); + debug("DMA end\n"); - break; + writel((1 << 3), &host->reg->norintsts); + writel(address, &host->reg->sysad); } else if (mask & (1 << 1)) { /* Transfer Complete */ debug("r/w is done\n"); @@ -425,12 +431,13 @@ static int mmc_core_init(struct mmc *mmc) * NORMAL Interrupt Status Enable Register init * [5] ENSTABUFRDRDY : Buffer Read Ready Status Enable * [4] ENSTABUFWTRDY : Buffer write Ready Status Enable + * [3] ENSTADMAINT : DMA Interrupt Status Enable * [1] ENSTASTANSCMPLT : Transfre Complete Status Enable * [0] ENSTACMDCMPLT : Command Complete Status Enable - */ + */ mask = readl(&host->reg->norintstsen); mask &= ~(0xffff); - mask |= (1 << 5) | (1 << 4) | (1 << 1) | (1 << 0); + mask |= (1 << 5) | (1 << 4) | (1 << 3) | (1 << 1) | (1 << 0); writel(mask, &host->reg->norintstsen); /*