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[U-Boot,PATCHv2] omap3evm: Update ethernet reset sequence for Rev.G board

Message ID 1309190145-24994-1-git-send-email-premi@ti.com
State Accepted
Commit c06825873dbc977028c393cb9cbe320634cb5785
Headers show

Commit Message

Sanjeev Premi June 27, 2011, 3:55 p.m. UTC
From: Sriramakrishnan <srk@ti.com>

The GPIO pin used for resetting the external LAN chip has
changed for Rev.G board.

The patch uses generic gpio API instead of direct access
to corresponding registers.

Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
---

 Changes since v1:
 * Use of gpio API instead of direct register access.

 Tested basic ethernet operations - dhcp and tftpboot - on the
 OMAP3EVM Rev G to load kernel and ramdisk images.

 board/ti/evm/evm.c |   35 ++++++++++++++++++++++++++---------
 1 files changed, 26 insertions(+), 9 deletions(-)
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Patch

diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index 8f9f141..2c95fae 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -33,10 +33,14 @@ 
 #include <asm/arch/mem.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/arch/gpio.h>
 #include <i2c.h>
 #include <asm/mach-types.h>
 #include "evm.h"
 
+#define OMAP3EVM_GPIO_ETH_RST_GEN1		64
+#define OMAP3EVM_GPIO_ETH_RST_GEN2		7
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static u32 omap3_evm_version;
@@ -181,17 +185,30 @@  static void setup_net_chip(void)
  */
 static void reset_net_chip(void)
 {
-	struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE;
-
-	/* Make GPIO 64 as output pin */
-	writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe);
-
-	/* Now send a pulse on the GPIO pin */
-	writel(GPIO0, &gpio3_base->setdataout);
+	int ret;
+	int rst_gpio;
+
+	if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) {
+		rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1;
+	} else {
+		rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2;
+	}
+
+	ret = omap_request_gpio(rst_gpio);
+	if (ret < 0) {
+		printf("Unable to get GPIO %d\n", rst_gpio);
+		return ;
+	}
+
+	/* Configure as output */
+	omap_set_gpio_direction(rst_gpio, 0);
+
+	/* Send a pulse on the GPIO pin */
+	omap_set_gpio_dataout(rst_gpio, 1);
 	udelay(1);
-	writel(GPIO0, &gpio3_base->cleardataout);
+	omap_set_gpio_dataout(rst_gpio, 0);
 	udelay(1);
-	writel(GPIO0, &gpio3_base->setdataout);
+	omap_set_gpio_dataout(rst_gpio, 1);
 }
 
 int board_eth_init(bd_t *bis)