From patchwork Wed Jun 22 19:24:08 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sanjeev Premi X-Patchwork-Id: 101538 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0F788B6F7F for ; Thu, 23 Jun 2011 05:25:04 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DAC77280D6; Wed, 22 Jun 2011 21:24:49 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id z+zHIfiy+mfU; Wed, 22 Jun 2011 21:24:49 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1332C280C1; Wed, 22 Jun 2011 21:24:41 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 560002809B for ; Wed, 22 Jun 2011 21:24:31 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aK-WOiLYK5dp for ; Wed, 22 Jun 2011 21:24:30 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by theia.denx.de (Postfix) with ESMTPS id 2E91428093 for ; Wed, 22 Jun 2011 21:24:27 +0200 (CEST) Received: from dbdp20.itg.ti.com ([172.24.170.38]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id p5MJONlb029972 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 22 Jun 2011 14:24:25 -0500 Received: from dbde71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p5MJOMNB028912 for ; Thu, 23 Jun 2011 00:54:22 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 8.3.106.1; Thu, 23 Jun 2011 00:54:22 +0530 Received: from psplinux050.india.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p5MJODRd028070; Thu, 23 Jun 2011 00:54:20 +0530 (IST) From: Sanjeev Premi To: Date: Thu, 23 Jun 2011 00:54:08 +0530 Message-ID: <1308770649-3802-3-git-send-email-premi@ti.com> X-Mailer: git-send-email 1.7.2.2 In-Reply-To: <1308770649-3802-1-git-send-email-premi@ti.com> References: <1308770649-3802-1-git-send-email-premi@ti.com> MIME-Version: 1.0 Cc: Sriramakrishnan Subject: [U-Boot] [PATCH 2/3] omap3evm: Update ethernet reset sequence for Rev.G board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Sriramakrishnan The GPIO pin used for resetting the external LAN chip has changed for Rev.G board. Signed-off-by: Sriramakrishnan Signed-off-by: Sanjeev Premi --- board/ti/evm/evm.c | 27 ++++++++++++++++++--------- 1 files changed, 18 insertions(+), 9 deletions(-) diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c index 8f9f141..57e5fa5 100644 --- a/board/ti/evm/evm.c +++ b/board/ti/evm/evm.c @@ -181,17 +181,26 @@ static void setup_net_chip(void) */ static void reset_net_chip(void) { - struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE; - - /* Make GPIO 64 as output pin */ - writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe); - - /* Now send a pulse on the GPIO pin */ - writel(GPIO0, &gpio3_base->setdataout); + struct gpio *gpio_base; + u32 pin; + + if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) { + gpio_base = (struct gpio *)OMAP34XX_GPIO3_BASE; + pin = GPIO0; /* Output pin: GPIO Bank 3, pin 0 */ + } else { + gpio_base = (struct gpio *)OMAP34XX_GPIO1_BASE; + pin = GPIO7; /* Output pin: GPIO Bank 0, pin 7 */ + } + + /* Configure the pin as output */ + writel(readl(&gpio_base->oe) & ~(pin), &gpio_base->oe); + + /* Send a pulse on the GPIO pin */ + writel(pin, &gpio_base->setdataout); udelay(1); - writel(GPIO0, &gpio3_base->cleardataout); + writel(pin, &gpio_base->cleardataout); udelay(1); - writel(GPIO0, &gpio3_base->setdataout); + writel(pin, &gpio_base->setdataout); } int board_eth_init(bd_t *bis)