From patchwork Sun May 1 21:10:16 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Guinot X-Patchwork-Id: 93578 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 42E84B6F35 for ; Mon, 2 May 2011 07:11:47 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 11760281FF; Sun, 1 May 2011 23:11:09 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Svj7sgQq3A-s; Sun, 1 May 2011 23:11:08 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 95DE4281B2; Sun, 1 May 2011 23:10:43 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C05E12819B for ; Sun, 1 May 2011 23:10:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id wyEtuN+X-1SN for ; Sun, 1 May 2011 23:10:34 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from ns39351.ovh.net (ns39351.ovh.net [91.121.21.191]) by theia.denx.de (Postfix) with ESMTP id 01A5C2818E for ; Sun, 1 May 2011 23:10:30 +0200 (CEST) Received: from localhost (87-98-128-90.ovh.net [87.98.128.90]) by ns39351.ovh.net (Postfix) with ESMTPSA id E0F4924DCC; Sun, 1 May 2011 23:10:29 +0200 (CEST) From: Simon Guinot To: Prafulla Wadaskar , Albert ARIBAUD , Wolfgang Denk Date: Sun, 1 May 2011 23:10:16 +0200 Message-Id: <1304284220-15215-3-git-send-email-sguinot@lacie.com> X-Mailer: git-send-email 1.6.3.1 In-Reply-To: <1304284220-15215-1-git-send-email-sguinot@lacie.com> References: <1304284220-15215-1-git-send-email-sguinot@lacie.com> Cc: u-boot@lists.denx.de, Simon Guinot Subject: [U-Boot] [PATCH v2 2/6] sf: disable write protection for Macronix flash X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Simon Guinot --- drivers/mtd/spi/macronix.c | 87 ++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 87 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/spi/macronix.c b/drivers/mtd/spi/macronix.c index 8e4d71c..b587ac9 100644 --- a/drivers/mtd/spi/macronix.c +++ b/drivers/mtd/spi/macronix.c @@ -49,6 +49,10 @@ #define CMD_MX25XX_DP 0xb9 /* Deep Power-down */ #define CMD_MX25XX_RES 0xab /* Release from DP, and Read Signature */ +/* Status registers */ +#define MX25XX_SR_BP (0xF << 2) /* Block Protect */ +#define MX25XX_SR_SRWP (1 << 7) /* Write Protect */ + struct macronix_spi_flash_params { u16 idcode; u16 page_size; @@ -120,6 +124,86 @@ static const struct macronix_spi_flash_params macronix_spi_flash_table[] = { }, }; +static int macronix_write_status(struct spi_flash *flash, u8 sr) +{ + u8 cmd[2]; + int ret; + + ret = spi_flash_cmd(flash->spi, CMD_MX25XX_WREN, NULL, 0); + if (ret < 0) { + debug("SF: Enabling Write failed\n"); + return ret; + } + + cmd[0] = CMD_MX25XX_WRSR; + cmd[1] = sr; + ret = spi_xfer(flash->spi, 16, cmd, NULL, SPI_XFER_BEGIN); + if (ret) { + debug("SF: fail to write status register\n"); + return ret; + } + + spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_END); + + ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); + if (ret < 0) { + debug("SF: write status register timed out\n"); + return ret; + } + + return 0; +} + +static int macronix_read_status(struct spi_flash *flash, u8 *sr) +{ + u8 cmd = CMD_MX25XX_RDSR; + int ret; + + ret = spi_xfer(flash->spi, 8, &cmd, NULL, SPI_XFER_BEGIN); + if (ret) { + debug("SF: Failed to send command %02x: %d\n", cmd, ret); + return ret; + } + ret = spi_xfer(flash->spi, 8, NULL, sr, 0); + if (ret) { + debug("SF: fail to read status register: %d\n", ret); + return ret; + } + + spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_END); + + return 0; +} + +static int macronix_disable_protect(struct spi_flash *flash) +{ + int ret; + u8 sr; + + ret = macronix_read_status(flash, &sr); + if (ret) + return ret; + + if ((sr & MX25XX_SR_BP) == 0) + return ret; + + /* Disable status register write protection. */ + sr &= ~MX25XX_SR_SRWP; + ret = macronix_write_status(flash, sr); + if (ret) + return ret; + + /* Disable block protection. */ + sr &= ~MX25XX_SR_BP; + ret = macronix_write_status(flash, sr); + if (ret) + return ret; + + printf("SF: disable write protection\n"); + + return 0; +} + static int macronix_write(struct spi_flash *flash, u32 offset, size_t len, const void *buf) { @@ -223,5 +307,8 @@ struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode) * params->sectors_per_block; mcx->flash.size = mcx->flash.sector_size * params->nr_blocks; + if (macronix_disable_protect(&mcx->flash)) + printf("SF: disable write protection failed\n"); + return &mcx->flash; }