From patchwork Fri Apr 29 14:58:46 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timur Tabi X-Patchwork-Id: 93434 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 798BEB6EE6 for ; Sat, 30 Apr 2011 00:59:12 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7E7C7280A9; Fri, 29 Apr 2011 16:59:08 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ZZX3XRGJutXJ; Fri, 29 Apr 2011 16:59:08 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E031D280AA; Fri, 29 Apr 2011 16:59:05 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E1FE8280AA for ; Fri, 29 Apr 2011 16:59:03 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id nt4gEVxlPFK7 for ; Fri, 29 Apr 2011 16:59:03 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from DB3EHSOBE005.bigfish.com (db3ehsobe005.messaging.microsoft.com [213.199.154.143]) by theia.denx.de (Postfix) with ESMTPS id 050C3280A9 for ; Fri, 29 Apr 2011 16:59:01 +0200 (CEST) Received: from mail60-db3-R.bigfish.com (10.3.81.254) by DB3EHSOBE005.bigfish.com (10.3.84.25) with Microsoft SMTP Server id 14.1.225.8; Fri, 29 Apr 2011 14:58:57 +0000 Received: from mail60-db3 (localhost.localdomain [127.0.0.1]) by mail60-db3-R.bigfish.com (Postfix) with ESMTP id BE2A088015D for ; Fri, 29 Apr 2011 14:58:57 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail60-db3 (localhost.localdomain [127.0.0.1]) by mail60-db3 (MessageSwitch) id 1304089137642372_20387; Fri, 29 Apr 2011 14:58:57 +0000 (UTC) Received: from DB3EHSMHS010.bigfish.com (unknown [10.3.81.243]) by mail60-db3.bigfish.com (Postfix) with ESMTP id 9AACB98050 for ; Fri, 29 Apr 2011 14:58:57 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB3EHSMHS010.bigfish.com (10.3.87.110) with Microsoft SMTP Server (TLS) id 14.1.225.8; Fri, 29 Apr 2011 14:58:56 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.270.2; Fri, 29 Apr 2011 09:58:46 -0500 Received: from efes.am.freescale.net (efes.am.freescale.net [10.82.123.3]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p3TEwkSi001106; Fri, 29 Apr 2011 09:58:46 -0500 (CDT) From: Timur Tabi To: , Date: Fri, 29 Apr 2011 09:58:46 -0500 Message-ID: <1304089126-11945-1-git-send-email-timur@freescale.com> X-Mailer: git-send-email 1.7.3.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Subject: [U-Boot] [PATCH] [v2] powerpc/85xx: fix compatible property for the L2 cache node X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The compatible property for the L2 cache node (on 85xx systems that don't have a CPC) was using a value for the property length that did not match the actual length of the property. Signed-off-by: Timur Tabi --- arch/powerpc/cpu/mpc85xx/fdt.c | 13 +++++++------ 1 files changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 642f6c5..a3a4b65 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -165,7 +165,6 @@ static inline void ft_fixup_l2cache(void *blob) int len, off; u32 *ph; struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr())); - char compat_buf[38]; const u32 line_size = 32; const u32 num_ways = 8; @@ -192,22 +191,24 @@ static inline void ft_fixup_l2cache(void *blob) } if (cpu) { + char compat_buf[40]; + if (isdigit(cpu->name[0])) len = sprintf(compat_buf, - "fsl,mpc%s-l2-cache-controller", cpu->name); + "fsl,mpc%s-l2-cache-controller" "%c" "cache", + cpu->name, 0); else len = sprintf(compat_buf, - "fsl,%c%s-l2-cache-controller", - tolower(cpu->name[0]), cpu->name + 1); + "fsl,%c%s-l2-cache-controller" "%c" "cache", + tolower(cpu->name[0]), cpu->name + 1, 0); - sprintf(&compat_buf[len + 1], "cache"); + fdt_setprop(blob, off, "compatible", compat_buf, len + 1); } fdt_setprop(blob, off, "cache-unified", NULL, 0); fdt_setprop_cell(blob, off, "cache-block-size", line_size); fdt_setprop_cell(blob, off, "cache-size", size); fdt_setprop_cell(blob, off, "cache-sets", num_sets); fdt_setprop_cell(blob, off, "cache-level", 2); - fdt_setprop(blob, off, "compatible", compat_buf, sizeof(compat_buf)); /* we dont bother w/L3 since no platform of this type has one */ }