| Message ID | 1304062012-15396-1-git-send-email-afleming@freescale.com |
|---|---|
| State | Accepted |
| Commit | 40ac3d462d2927fdf45263d360bcc275de452be6 |
| Delegated to: | Kumar Gala |
| Headers | show |
On Apr 29, 2011, at 2:26 AM, Andy Fleming wrote: > The tsec driver was defining the default MDIO address as > the TSEC_BASE + 0x520, but on eTSEC2 controllers, the first > TSEC's registers are separated from the MDIO registers. Use > the existing MDIO_BASE_ADDR, instead. > > Signed-off-by: Andy Fleming <afleming@freescale.com> > --- > include/tsec.h | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) applied to 85xx - k
Andy Fleming wrote: > The tsec driver was defining the default MDIO address as > the TSEC_BASE + 0x520, but on eTSEC2 controllers, the first > TSEC's registers are separated from the MDIO registers. Use > the existing MDIO_BASE_ADDR, instead. > > Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> This fixes Ethernet on the P1022DS.
diff --git a/include/tsec.h b/include/tsec.h index 8ed30ac..f0f3d4d 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -25,7 +25,7 @@ #define TSEC_SIZE 0x01000 #define TSEC_MDIO_OFFSET 0x01000 -#define CONFIG_SYS_MDIO_BASE_ADDR (TSEC_BASE_ADDR + 0x520) +#define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + 0x520) #define DEFAULT_MII_NAME "FSL_MDIO"
The tsec driver was defining the default MDIO address as the TSEC_BASE + 0x520, but on eTSEC2 controllers, the first TSEC's registers are separated from the MDIO registers. Use the existing MDIO_BASE_ADDR, instead. Signed-off-by: Andy Fleming <afleming@freescale.com> --- include/tsec.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)