From patchwork Fri Apr 29 07:13:13 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefano Babic X-Patchwork-Id: 93398 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D629D1007D7 for ; Fri, 29 Apr 2011 17:13:32 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 969E32809F; Fri, 29 Apr 2011 09:13:29 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id L+HrSjV9Y0om; Fri, 29 Apr 2011 09:13:29 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9083328098; Fri, 29 Apr 2011 09:13:26 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 84F8628098 for ; Fri, 29 Apr 2011 09:13:24 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id FSQJIwQViw5g for ; Fri, 29 Apr 2011 09:13:22 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtpi4.ngi.it (smtpi4.ngi.it [88.149.128.104]) by theia.denx.de (Postfix) with ESMTP id 0815828096 for ; Fri, 29 Apr 2011 09:13:20 +0200 (CEST) Received: from paperina.lan (unknown [88.149.182.160]) by smtpi4.ngi.it (Postfix) with ESMTP id 1AA3142E6E; Fri, 29 Apr 2011 09:13:16 +0200 (CEST) Received: from papero.lan (papero.lan [192.168.2.105]) by paperina.lan (Postfix) with ESMTP id A0979140A0B5; Fri, 29 Apr 2011 09:13:15 +0200 (CEST) From: Stefano Babic To: u-boot@lists.denx.de Date: Fri, 29 Apr 2011 09:13:13 +0200 Message-Id: <1304061193-23544-1-git-send-email-sbabic@denx.de> X-Mailer: git-send-email 1.7.1 Cc: Fabio Estevam Subject: [U-Boot] [PATCH] MX31: change return value of get_cpu_rev X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Drop warnings in get_cpu_rev and changes the return value (a u32 instead of char * is returned) of the function to be coherent with other processors. Signed-off-by: Stefano Babic CC: Detlev Zundev CC: Fabio Estevam --- This is a follow-up patch of "MX31: drop warnings in get_cpu_rev", as this patch was already integrated in u-boot mainline, and implements the comments discussed on ML. - Detlev Zundev: be coherent with other architecture arch/arm/cpu/arm1136/mx31/generic.c | 29 ++++++++++++++++------------- arch/arm/include/asm/arch-mx31/imx-regs.h | 2 +- 2 files changed, 17 insertions(+), 14 deletions(-) diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index 18572b9..461d960 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -107,18 +107,18 @@ void mx31_set_pad(enum iomux_pins pin, u32 config) } struct mx3_cpu_type mx31_cpu_type[] = { - { .srev = 0x00, .v = "1.0" }, - { .srev = 0x10, .v = "1.1" }, - { .srev = 0x11, .v = "1.1" }, - { .srev = 0x12, .v = "1.15" }, - { .srev = 0x13, .v = "1.15" }, - { .srev = 0x14, .v = "1.2" }, - { .srev = 0x15, .v = "1.2" }, - { .srev = 0x28, .v = "2.0" }, - { .srev = 0x29, .v = "2.0" }, + { .srev = 0x00, .v = 0x10 }, + { .srev = 0x10, .v = 0x11 }, + { .srev = 0x11, .v = 0x11 }, + { .srev = 0x12, .v = 0x1F }, + { .srev = 0x13, .v = 0x1F }, + { .srev = 0x14, .v = 0x12 }, + { .srev = 0x15, .v = 0x12 }, + { .srev = 0x28, .v = 0x20 }, + { .srev = 0x29, .v = 0x20 }, }; -char *get_cpu_rev(void) +u32 get_cpu_rev(void) { u32 i, srev; @@ -129,7 +129,7 @@ char *get_cpu_rev(void) for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) if (srev == mx31_cpu_type[i].srev) return mx31_cpu_type[i].v; - return "unknown"; + return srev; } char *get_reset_cause(void) @@ -161,8 +161,11 @@ char *get_reset_cause(void) #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo (void) { - printf("CPU: Freescale i.MX31 rev %s at %d MHz.", - get_cpu_rev(), mx31_get_mcu_main_clk() / 1000000); + u32 srev = get_cpu_rev(); + + printf("CPU: Freescale i.MX31 rev %d.%d at %d MHz.", + (srev & 0xF0) >> 4, (srev & 0x0F), + mx31_get_mcu_main_clk() / 1000000); printf("Reset cause: %s\n", get_reset_cause()); return 0; } diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index c830a03..306f966 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -105,7 +105,7 @@ struct iim_regs { struct mx3_cpu_type { u8 srev; - char *v; + u32 v; }; #define IOMUX_PADNUM_MASK 0x1ff