diff mbox

[U-Boot] ftsmc020: enhance for features and asm support.

Message ID 1300965924-20508-1-git-send-email-macpaul@andestech.com
State Superseded
Headers show

Commit Message

Macpaul Lin March 24, 2011, 11:25 a.m. UTC 
1. Enhance ftsmc020 according to datasheets.
2. Add assembly register offsets for support lowlevel_init.S.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
---
Note:
  This patch should be applied after patch
  "[U-Boot,v2,4/4] ftsmc020: move ftsmc020 static mem controller to 
driver/mtd"
  (/patch/87862/) is applied.

 include/faraday/ftsmc020.h |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+), 0 deletions(-)

Comments

Wolfgang Denk March 24, 2011, 1:21 p.m. UTC | #1 
Dear "Macpaul Lin",

In message <1300965924-20508-1-git-send-email-macpaul@andestech.com> you wrote:
> 1. Enhance ftsmc020 according to datasheets.
> 2. Add assembly register offsets for support lowlevel_init.S.

NAK. Such register offsets should be automatically generated from the
respective C structs using make-asm-offsets; see the
generic-asm-offsets.h / asm-offsets.s build rules in the top level
Makefile.

Best regards,

Wolfgang Denk
diff mbox

Patch

diff --git a/include/faraday/ftsmc020.h b/include/faraday/ftsmc020.h
index 95d9500..a980c1c 100644
--- a/include/faraday/ftsmc020.h
+++ b/include/faraday/ftsmc020.h
@@ -46,6 +46,10 @@  void ftsmc020_init(void);

 #define FTSMC020_BANK_WPROT	(1 << 11)

+#define FTSMC020_BANK_TYPE1	(1 << 10)
+#define FTSMC020_BANK_TYPE2	(1 << 9)
+#define FTSMC020_BANK_TYPE3	(1 << 8)
+
 #define FTSMC020_BANK_SIZE_32K	(0xb << 4)
 #define FTSMC020_BANK_SIZE_64K	(0xc << 4)
 #define FTSMC020_BANK_SIZE_128K	(0xd << 4)
@@ -57,6 +61,7 @@  void ftsmc020_init(void);
 #define FTSMC020_BANK_SIZE_8M	(0x3 << 4)
 #define FTSMC020_BANK_SIZE_16M	(0x4 << 4)
 #define FTSMC020_BANK_SIZE_32M	(0x5 << 4)
+#define FTSMC020_BANK_SIZE_64M	(0x6 << 4)

 #define FTSMC020_BANK_MBW_8	(0x0 << 0)
 #define FTSMC020_BANK_MBW_16	(0x1 << 0)
@@ -76,4 +81,27 @@  void ftsmc020_init(void);
 #define FTSMC020_TPR_AHT(x)	(((x) & 0x3) << 4)
 #define FTSMC020_TPR_TRNA(x)	(((x) & 0xf) << 0)

+/*
+ * CONFIG and TIME Registers Offsets in ASSEMBLY
+ */
+#ifdef __ASSEMBLY__
+#define FTSMC020_CONFIG0		0x00
+#define FTSMC020_TIME0			0x04
+#define FTSMC020_CONFIG1		0x08
+#define FTSMC020_TIME1			0x0C
+#define FTSMC020_CONFIG2		0x10
+#define FTSMC020_TIME2			0x14
+#define FTSMC020_CONFIG3		0x18
+#define FTSMC020_TIME3			0x1C
+#define FTSMC020_CONFIG4		0x20
+#define FTSMC020_TIME4			0x24
+#define FTSMC020_CONFIG5		0x28
+#define FTSMC020_TIME5			0x2C
+#define FTSMC020_CONFIG6		0x30
+#define FTSMC020_TIME6			0x34
+#define FTSMC020_CONFIG7		0x38
+#define FTSMC020_TIME7			0x3C
+#define FTSMC020_SHADOW			0x40
+#endif /* __ASSEMBLY__ */
+
 #endif	/* __FTSMC020_H */