| Message ID | 1300391223-11879-7-git-send-email-mspang@csclub.uwaterloo.ca |
|---|---|
| State | Rejected |
| Delegated to: | Albert ARIBAUD |
| Headers | show |
Dear Michael Spang, In message <1300391223-11879-7-git-send-email-mspang@csclub.uwaterloo.ca> you wrote: > The TS-7800 needs to skip SDRAM initialization since it loads from > RAM, but the CPU should still be initialized to the correct state. > Thus we add an #ifdef around the call to the lowlevel_init function. > > Signed-off-by: Michael Spang <mspang@csclub.uwaterloo.ca> How can the SDRAM be initialized when the CPU is not? Best regards, Wolfgang Denk
Hi Wolfgang et al., (replying both to 5/9 and 6/9 here) Le 25/04/2011 01:55, Wolfgang Denk a écrit : > This is an inconsistency between architectures which I dislike. Then these two config options could be defined for other architectures as well. > Also, what in case we should want to skip only cpu_init_crit and not > lowlevel_init? If we need to handle these separately, then we need 2 > CONFIG options. Agreed this complete separation could be useful in case U-Boot is not the code executed on startup, and this startup code does the CPU initialization but leaves the rest to U-Boot for commodity. > How can the SDRAM be initialized when the CPU is not? Debugging sessions come to mind, where the debugger resets the target and initializes SDRAM to load the target code. I've also seen cases on multiple-core ICs where an ARM core starts with SDRAM access already working, but U-Boot was not involved. The idea is that during board bring-up, rather than have people try and neutralize some code in assembly language startup files, they just temporarily define the configuration options CONFIG_SKIP_* in their board's config header file (and, for those boards that have an IPL of some sort before U-Boot, they keep the relevant CONFIG_SKIP_* there once debugged). > Best regards, > > Wolfgang Denk Amicalement,
On Sun, Apr 24, 2011 at 7:55 PM, Wolfgang Denk <wd@denx.de> wrote: > Dear Michael Spang, > > In message <1300391223-11879-7-git-send-email-mspang@csclub.uwaterloo.ca> you wrote: >> The TS-7800 needs to skip SDRAM initialization since it loads from >> RAM, but the CPU should still be initialized to the correct state. >> Thus we add an #ifdef around the call to the lowlevel_init function. >> >> Signed-off-by: Michael Spang <mspang@csclub.uwaterloo.ca> > > How can the SDRAM be initialized when the CPU is not? It is already initialized, but even if the state matches what U-Boot expects now, I'm not confident the desired settings will never change. So I think it is best to just run U-Boot's initialization anyway. Michael
diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile b/arch/arm/cpu/arm926ejs/at91/Makefile index 7fb1a0a..efe9e9bd 100644 --- a/arch/arm/cpu/arm926ejs/at91/Makefile +++ b/arch/arm/cpu/arm926ejs/at91/Makefile @@ -42,8 +42,10 @@ COBJS-y += reset.o COBJS-y += timer.o ifndef CONFIG_SKIP_CPU_INIT_CRIT +ifndef CONFIG_SKIP_LOWLEVEL_INIT SOBJS-y := lowlevel_init.o endif +endif SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) diff --git a/arch/arm/cpu/arm926ejs/davinci/Makefile b/arch/arm/cpu/arm926ejs/davinci/Makefile index 3442f6e..d283d61 100644 --- a/arch/arm/cpu/arm926ejs/davinci/Makefile +++ b/arch/arm/cpu/arm926ejs/davinci/Makefile @@ -37,8 +37,10 @@ COBJS-$(CONFIG_DRIVER_TI_EMAC) += lxt972.o dp83848.o et1011c.o SOBJS = reset.o ifndef CONFIG_SKIP_CPU_INIT_CRIT +ifndef CONFIG_SKIP_LOWLEVEL_INIT SOBJS += lowlevel_init.o endif +endif SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) diff --git a/arch/arm/cpu/arm926ejs/orion5x/Makefile b/arch/arm/cpu/arm926ejs/orion5x/Makefile index 780fe18..8045e53 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/Makefile +++ b/arch/arm/cpu/arm926ejs/orion5x/Makefile @@ -34,8 +34,10 @@ COBJS-y += dram.o COBJS-y += timer.o ifndef CONFIG_SKIP_CPU_INIT_CRIT +ifndef CONFIG_SKIP_LOWLEVEL_INIT SOBJS := lowlevel_init.o endif +endif SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index c0a2532..2e1d5ec 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -334,12 +334,15 @@ cpu_init_crit: orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ mcr p15, 0, r0, c1, c0, 0 +#ifndef CONFIG_SKIP_LOWLEVEL_INIT /* * Go setup Memory and board specific bits prior to relocation. */ mov ip, lr /* perserve link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_CPU_INIT_CRIT */
The TS-7800 needs to skip SDRAM initialization since it loads from RAM, but the CPU should still be initialized to the correct state. Thus we add an #ifdef around the call to the lowlevel_init function. Signed-off-by: Michael Spang <mspang@csclub.uwaterloo.ca> --- arch/arm/cpu/arm926ejs/at91/Makefile | 2 ++ arch/arm/cpu/arm926ejs/davinci/Makefile | 2 ++ arch/arm/cpu/arm926ejs/orion5x/Makefile | 2 ++ arch/arm/cpu/arm926ejs/start.S | 3 +++ 4 files changed, 9 insertions(+), 0 deletions(-)