From patchwork Thu Mar 17 19:46:55 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Spang X-Patchwork-Id: 87422 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id BDB73B6FBB for ; Fri, 18 Mar 2011 06:56:20 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 09D4628126; Thu, 17 Mar 2011 20:55:57 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KbXTZDBQTg7u; Thu, 17 Mar 2011 20:55:56 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EB4EC28127; Thu, 17 Mar 2011 20:55:24 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EB306280CA for ; Thu, 17 Mar 2011 20:55:19 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VLaGjf87GZBn for ; Thu, 17 Mar 2011 20:55:19 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from caffeine.csclub.uwaterloo.ca (caffeine.csclub.uwaterloo.ca [129.97.134.17]) by theia.denx.de (Postfix) with ESMTP id F2EF72810A for ; Thu, 17 Mar 2011 20:55:15 +0100 (CET) Received: from corn-syrup (corn-syrup.csclub.uwaterloo.ca [129.97.134.72]) by caffeine.csclub.uwaterloo.ca (Postfix) with SMTP id 03B3BC85; Thu, 17 Mar 2011 15:47:05 -0400 (EDT) Received: by corn-syrup (sSMTP sendmail emulation); Thu, 17 Mar 2011 15:47:05 -0400 From: Michael Spang To: u-boot@lists.denx.de Date: Thu, 17 Mar 2011 15:46:55 -0400 Message-Id: <1300391223-11879-2-git-send-email-mspang@csclub.uwaterloo.ca> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1300391223-11879-1-git-send-email-mspang@csclub.uwaterloo.ca> References: <1300391223-11879-1-git-send-email-mspang@csclub.uwaterloo.ca> Cc: Michael Spang , Alexander Clouter Subject: [U-Boot] [PATCH 1/9] arm926ej-s: Invalidate instruction cache in flush_cache X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de If U-Boot is loaded from RAM and the OS is loaded into an overlapping region, the instruction cache is not coherent when that OS is started. We must therefore invalidate the instruction cache in addition to cleaning the data cache. Signed-off-by: Michael Spang --- arch/arm/lib/cache.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index 30686fe..047786a 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -37,6 +37,8 @@ void flush_cache (unsigned long dummy1, unsigned long dummy2) asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory"); /* disable write buffer as well (page 2-22) */ asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); + /* invalidate icache for coherence with cleaned dcache */ + asm("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); #endif #ifdef CONFIG_OMAP34XX void v7_flush_cache_all(void);