From patchwork Tue Mar 15 06:25:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kumar Gala X-Patchwork-Id: 86883 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D8E3EB6F90 for ; Tue, 15 Mar 2011 17:25:31 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5ED6328089; Tue, 15 Mar 2011 07:25:28 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0JypuJ27nLVj; Tue, 15 Mar 2011 07:25:28 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9CE1828083; Tue, 15 Mar 2011 07:25:26 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8626828083 for ; Tue, 15 Mar 2011 07:25:24 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id LPgveo5YW6MH for ; Tue, 15 Mar 2011 07:25:22 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by theia.denx.de (Postfix) with ESMTPS id 4008D28080 for ; Tue, 15 Mar 2011 07:25:19 +0100 (CET) Received: from localhost (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id p2F6PE6M028800 for ; Tue, 15 Mar 2011 01:25:15 -0500 From: Kumar Gala To: u-boot@lists.denx.de Date: Tue, 15 Mar 2011 01:25:14 -0500 Message-Id: <1300170314-4417-1-git-send-email-galak@kernel.crashing.org> X-Mailer: git-send-email 1.5.6.5 Subject: [U-Boot] [PATCH] powerpc/85xx: Fix synchronization of timebase on MP boot X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de There is a small ordering issue in the master core in that we need to make sure the disabling of the timebase in the SoC is visible before we set the value to 0. We can simply just read back the value to synchronizatize the write, before we set TB to 0. Reported-by: Dan Hettena Tested-by: Dan Hettena Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/mp.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c index 6c0da83..758e6d7 100644 --- a/arch/powerpc/cpu/mpc85xx/mp.c +++ b/arch/powerpc/cpu/mpc85xx/mp.c @@ -276,8 +276,13 @@ static void plat_mp_up(unsigned long bootpg) /* enable time base at the platform */ out_be32(&rcpm->ctbenrl, 0); + + /* readback to sync write */ + in_be32(&rcpm->ctbenrl); + mtspr(SPRN_TBWU, 0); mtspr(SPRN_TBWL, 0); + out_be32(&rcpm->ctbenrl, (1 << nr_cpus) - 1); #ifdef CONFIG_MPC8xxx_DISABLE_BPTR @@ -347,6 +352,10 @@ static void plat_mp_up(unsigned long bootpg) else devdisr |= MPC85xx_DEVDISR_TB0; out_be32(&gur->devdisr, devdisr); + + /* readback to sync write */ + in_be32(&gur->devdisr); + mtspr(SPRN_TBWU, 0); mtspr(SPRN_TBWL, 0);