From patchwork Mon Mar 14 20:47:25 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew McClintock X-Patchwork-Id: 86816 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C521BB6FB1 for ; Tue, 15 Mar 2011 07:44:44 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EA8DB280A4; Mon, 14 Mar 2011 21:44:42 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WvNsXOxYi8Ms; Mon, 14 Mar 2011 21:44:42 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5B95A2807E; Mon, 14 Mar 2011 21:44:39 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3D9C82807B for ; Mon, 14 Mar 2011 21:44:37 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id wM3+zdl9G2Xw for ; Mon, 14 Mar 2011 21:44:35 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from DB3EHSOBE003.bigfish.com (db3ehsobe003.messaging.microsoft.com [213.199.154.141]) by theia.denx.de (Postfix) with ESMTPS id 15B0128083 for ; Mon, 14 Mar 2011 21:44:33 +0100 (CET) Received: from mail59-db3-R.bigfish.com (10.3.81.244) by DB3EHSOBE003.bigfish.com (10.3.84.23) with Microsoft SMTP Server id 14.1.225.8; Mon, 14 Mar 2011 20:44:30 +0000 Received: from mail59-db3 (localhost.localdomain [127.0.0.1]) by mail59-db3-R.bigfish.com (Postfix) with ESMTP id 7F6846F82AA for ; Mon, 14 Mar 2011 20:44:30 +0000 (UTC) X-SpamScore: 14 X-BigFish: VS14(zz82c2szz1202h1082kzzz2dh2a8h668h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail59-db3 (localhost.localdomain [127.0.0.1]) by mail59-db3 (MessageSwitch) id 1300135469618937_843; Mon, 14 Mar 2011 20:44:29 +0000 (UTC) Received: from DB3EHSMHS004.bigfish.com (unknown [10.3.81.246]) by mail59-db3.bigfish.com (Postfix) with ESMTP id 92D7331004F for ; Mon, 14 Mar 2011 20:44:29 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB3EHSMHS004.bigfish.com (10.3.87.104) with Microsoft SMTP Server (TLS) id 14.1.225.22; Mon, 14 Mar 2011 20:44:26 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.270.2; Mon, 14 Mar 2011 15:44:24 -0500 Received: from localhost.localdomain (pandora.am.freescale.net [10.82.123.16]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p2EKiOBZ017574; Mon, 14 Mar 2011 15:44:24 -0500 (CDT) From: Matthew McClintock To: Date: Mon, 14 Mar 2011 15:47:25 -0500 Message-ID: <1300135645-21544-1-git-send-email-msm@freescale.com> X-Mailer: git-send-email 1.5.6.5 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Matthew McClintock , kumar.gala@freescale.com, timur@freescale.com Subject: [U-Boot] [RFC] I2C: change CONFIG_SYS_SPD_BUS_NUM to CONFIG_I2C_DEFAULT_BUS_NUM X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The bus that the i2c api can access before relocating from flash is defined via CONFIG_SYS_SPD_BUS_NUM, however we want to use the i2c bus before relocating from flash for non-SPD related reasons. Therefore, we rename this define to something more appropriate --- We are trying to access the I2C bus before relocation from flash to read switch settings. Using the current CONFIG_SYS_SPD_BUS_NUM define to do this is fine for our needs however I would like to ask if we wanted to change this to a new more generic define CONFIG_I2C_DEFAULT_BUS_NUM README | 4 ++-- arch/powerpc/cpu/mpc5xxx/i2c.c | 2 +- arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c | 2 +- arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c | 2 +- board/freescale/common/sys_eeprom.c | 8 ++++---- drivers/i2c/fsl_i2c.c | 6 +++--- drivers/i2c/ppc4xx_i2c.c | 8 ++++---- include/configs/DU440.h | 2 +- include/configs/MPC8349ITX.h | 2 +- include/configs/MPC8536DS.h | 2 +- include/configs/MPC8572DS.h | 2 +- include/configs/P1022DS.h | 2 +- include/configs/P2020DS.h | 2 +- include/configs/corenet_ds.h | 2 +- include/configs/hcu4.h | 2 +- include/configs/hcu5.h | 2 +- include/configs/icon.h | 2 +- include/configs/katmai.h | 2 +- include/configs/mcu25.h | 2 +- include/configs/sbc8349.h | 2 +- include/configs/vme8349.h | 2 +- include/i2c.h | 4 ++-- 22 files changed, 32 insertions(+), 32 deletions(-) diff --git a/README b/README index 21cd71b..4284809 100644 --- a/README +++ b/README @@ -1576,7 +1576,7 @@ The following options need to be configured: will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 - CONFIG_SYS_SPD_BUS_NUM + CONFIG_I2C_DEFAULT_BUS_NUM If defined, then this indicates the I2C bus number for DDR SPD. If not defined, then U-Boot assumes that SPD is on I2C bus 0. @@ -2834,7 +2834,7 @@ Low Level (hardware related) configuration options: SPD_EEPROM_ADDRESS I2C address of the SPD EEPROM -- CONFIG_SYS_SPD_BUS_NUM +- CONFIG_I2C_DEFAULT_BUS_NUM If SPD EEPROM is on an I2C bus other than the first one, specify here. Note that the value must resolve to something your driver can deal with. diff --git a/arch/powerpc/cpu/mpc5xxx/i2c.c b/arch/powerpc/cpu/mpc5xxx/i2c.c index 9fb330f..65fb1f2 100644 --- a/arch/powerpc/cpu/mpc5xxx/i2c.c +++ b/arch/powerpc/cpu/mpc5xxx/i2c.c @@ -40,7 +40,7 @@ DECLARE_GLOBAL_DATA_PTR; #endif #else static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = - CONFIG_SYS_SPD_BUS_NUM; + CONFIG_I2C_DEFAULT_BUS_NUM; static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED}; diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c index 95df1d9..00984cd 100644 --- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c @@ -475,7 +475,7 @@ phys_size_t initdram(int board_type) */ /* switch to correct I2C bus */ - I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM); + I2C_SET_BUS(CONFIG_I2C_DEFAULT_BUS_NUM); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); /*------------------------------------------------------------------ diff --git a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c index c35b113..1431056 100644 --- a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c @@ -1048,7 +1048,7 @@ phys_size_t initdram(int board_type) * before continuing. */ /* switch to correct I2C bus */ - I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM); + I2C_SET_BUS(CONFIG_I2C_DEFAULT_BUS_NUM); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); /*------------------------------------------------------------------ diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 3ecfb06..2c678d3 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -495,11 +495,11 @@ int mac_read_from_eeprom(void) * This function is called before relocation, so we need to read a private * copy of the EEPROM into a local variable on the stack. * - * Also, we assume that CONFIG_SYS_EEPROM_BUS_NUM == CONFIG_SYS_SPD_BUS_NUM. The global - * variable i2c_bus_num must be compile-time initialized to CONFIG_SYS_SPD_BUS_NUM, + * Also, we assume that CONFIG_SYS_EEPROM_BUS_NUM == CONFIG_I2C_DEFAULT_BUS_NUM. The global + * variable i2c_bus_num must be compile-time initialized to CONFIG_I2C_DEFAULT_BUS_NUM, * so that the SPD code will work. This means that all pre-relocation I2C - * operations can only occur on the CONFIG_SYS_SPD_BUS_NUM bus. So if - * CONFIG_SYS_EEPROM_BUS_NUM != CONFIG_SYS_SPD_BUS_NUM, then we can't read the EEPROM when + * operations can only occur on the CONFIG_I2C_DEFAULT_BUS_NUM bus. So if + * CONFIG_SYS_EEPROM_BUS_NUM != CONFIG_I2C_DEFAULT_BUS_NUM, then we can't read the EEPROM when * this function is called. Oh well. */ unsigned int get_cpu_board_revision(void) diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index cb13dee..e509993 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -52,10 +52,10 @@ DECLARE_GLOBAL_DATA_PTR; * runs from ROM, and we can't switch buses because we can't modify * the global variables. */ -#ifndef CONFIG_SYS_SPD_BUS_NUM -#define CONFIG_SYS_SPD_BUS_NUM 0 +#ifndef CONFIG_I2C_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUM 0 #endif -static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = CONFIG_SYS_SPD_BUS_NUM; +static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = CONFIG_I2C_DEFAULT_BUS_NUM; #if defined(CONFIG_I2C_MUX) static unsigned int i2c_bus_num_mux __attribute__ ((section ("data"))) = 0; #endif diff --git a/drivers/i2c/ppc4xx_i2c.c b/drivers/i2c/ppc4xx_i2c.c index c1cbe55..7e43e7a 100644 --- a/drivers/i2c/ppc4xx_i2c.c +++ b/drivers/i2c/ppc4xx_i2c.c @@ -43,11 +43,11 @@ DECLARE_GLOBAL_DATA_PTR; * runs from ROM, and we can't switch buses because we can't modify * the global variables. */ -#ifndef CONFIG_SYS_SPD_BUS_NUM -#define CONFIG_SYS_SPD_BUS_NUM 0 +#ifndef CONFIG_I2C_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUM 0 #endif static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = - CONFIG_SYS_SPD_BUS_NUM; + CONFIG_I2C_DEFAULT_BUS_NUM; #endif /* CONFIG_I2C_MULTI_BUS */ static void _i2c_bus_reset(void) @@ -166,7 +166,7 @@ void i2c_init(int speed, int slaveaddr) } /* set to SPD bus as default bus upon powerup */ - I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM); + I2C_SET_BUS(CONFIG_I2C_DEFAULT_BUS_NUM); } /* diff --git a/include/configs/DU440.h b/include/configs/DU440.h index ceab604..1bffe8e 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -178,7 +178,7 @@ #define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_I2C_MULTI_BUS 1 -#define CONFIG_SYS_SPD_BUS_NUM 0 +#define CONFIG_I2C_DEFAULT_BUS_NUM 0 #define IIC1_MCP3021_ADDR 0x4d #define IIC1_USB2507_ADDR 0x2c #ifdef CONFIG_I2C_MULTI_BUS diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index de233ff..3193c6d 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -103,7 +103,7 @@ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_SYS_SPD_BUS_NUM 1 /* The I2C bus for SPD */ +#define CONFIG_I2C_DEFAULT_BUS_NUM 1 /* The I2C bus for SPD */ #define CONFIG_SYS_RTC_BUS_NUM 1 /* The I2C bus for RTC */ #define CONFIG_SYS_I2C_8574_ADDR1 0x20 /* I2C1, PCF8574 */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 13300de..a5f2e79 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -163,7 +163,7 @@ /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ -#define CONFIG_SYS_SPD_BUS_NUM 1 +#define CONFIG_I2C_DEFAULT_BUS_NUM 1 /* These are used when DDR doesn't use SPD. */ #define CONFIG_SYS_SDRAM_SIZE 256 /* DDR is 256MB */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index bf2fdd6..b7944da 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -148,7 +148,7 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL 2 /* I2C addresses of SPD EEPROMs */ -#define CONFIG_SYS_SPD_BUS_NUM 1 /* SPD EEPROMS locate on I2C bus 1 */ +#define CONFIG_I2C_DEFAULT_BUS_NUM 1 /* SPD EEPROMS locate on I2C bus 1 */ #define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ #define SPD_EEPROM_ADDRESS2 0x52 /* CTLR 1 DIMM 0 */ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index cb24041..fab193d 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -86,7 +86,7 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) /* I2C addresses of SPD EEPROMs */ -#define CONFIG_SYS_SPD_BUS_NUM 1 +#define CONFIG_I2C_DEFAULT_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ /* diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index b32a997..b0eb5ae 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -127,7 +127,7 @@ /* I2C addresses of SPD EEPROMs */ #define CONFIG_DDR_SPD -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD EEPROM located on I2C bus 0 */ +#define CONFIG_I2C_DEFAULT_BUS_NUM 0 /* SPD EEPROM located on I2C bus 0 */ #define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ /* These are used when DDR doesn't use SPD. */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index bff212e..1c93be0 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -137,7 +137,7 @@ #define CONFIG_DDR_SPD #define CONFIG_FSL_DDR3 -#define CONFIG_SYS_SPD_BUS_NUM 1 +#define CONFIG_I2C_DEFAULT_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ diff --git a/include/configs/hcu4.h b/include/configs/hcu4.h index c56efde..67b98c7 100644 --- a/include/configs/hcu4.h +++ b/include/configs/hcu4.h @@ -141,7 +141,7 @@ * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the * the first internal I2C controller of the PPC440EPx *----------------------------------------------------------------------*/ -#define CONFIG_SYS_SPD_BUS_NUM 0 +#define CONFIG_I2C_DEFAULT_BUS_NUM 0 #define CONFIG_IPADDR 172.25.1.14 diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h index 0c8fdf5..e7ecbeb 100644 --- a/include/configs/hcu5.h +++ b/include/configs/hcu5.h @@ -141,7 +141,7 @@ * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the * the second internal I2C controller of the PPC440EPx *----------------------------------------------------------------------*/ -#define CONFIG_SYS_SPD_BUS_NUM 1 +#define CONFIG_I2C_DEFAULT_BUS_NUM 1 /* Setup some board specific values for the default environment variables */ #define CONFIG_IPADDR 172.25.1.15 diff --git a/include/configs/icon.h b/include/configs/icon.h index 2fac0ef..ab34fe3 100644 --- a/include/configs/icon.h +++ b/include/configs/icon.h @@ -123,7 +123,7 @@ #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */ +#define CONFIG_I2C_DEFAULT_BUS_NUM 0 /* The I2C bus for SPD */ #define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 diff --git a/include/configs/katmai.h b/include/configs/katmai.h index 3ed8dc7..dfdc739 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -122,7 +122,7 @@ #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ #define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */ +#define CONFIG_I2C_DEFAULT_BUS_NUM 0 /* The I2C bus for SPD */ #define IIC0_BOOTPROM_ADDR 0x50 #define IIC0_ALT_BOOTPROM_ADDR 0x54 diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h index a162291..73df878 100644 --- a/include/configs/mcu25.h +++ b/include/configs/mcu25.h @@ -141,7 +141,7 @@ * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the * the first internal I2C controller of the PPC440EPx *----------------------------------------------------------------------*/ -#define CONFIG_SYS_SPD_BUS_NUM 0 +#define CONFIG_I2C_DEFAULT_BUS_NUM 0 /* Setup some board specific values for the default environment variables */ #define CONFIG_IPADDR 172.25.1.25 diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index b418cf2..588c500 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -290,7 +290,7 @@ #define CONFIG_SYS_I2C1_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C2_OFFSET -/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */ +/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_I2C_DEFAULT_BUS_NUM... */ /* TSEC */ #define CONFIG_SYS_TSEC1_OFFSET 0x24000 diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index d153762..b400988 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -221,7 +221,7 @@ #define CONFIG_SYS_I2C1_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C1_OFFSET -/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */ +/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_I2C_DEFAULT_BUS_NUM... */ #define CONFIG_SYS_I2C_8574_ADDR2 0x20 /* I2C1, PCF8574 */ diff --git a/include/i2c.h b/include/i2c.h index cd23c8a..452cffa 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -65,8 +65,8 @@ #if !defined(CONFIG_SYS_DTT_BUS_NUM) #define CONFIG_SYS_DTT_BUS_NUM 0 #endif -#if !defined(CONFIG_SYS_SPD_BUS_NUM) -#define CONFIG_SYS_SPD_BUS_NUM 0 +#if !defined(CONFIG_I2C_DEFAULT_BUS_NUM) +#define CONFIG_I2C_DEFAULT_BUS_NUM 0 #endif #ifndef I2C_SOFT_DECLARATIONS