From patchwork Tue Mar 8 13:07:32 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aneesh V X-Patchwork-Id: 85979 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id EE55EB6EDF for ; Wed, 9 Mar 2011 00:09:53 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B5382280A6; Tue, 8 Mar 2011 14:09:12 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Og9f1DniGZEE; Tue, 8 Mar 2011 14:09:12 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E9CFF280A8; Tue, 8 Mar 2011 14:08:33 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8E5082808D for ; Tue, 8 Mar 2011 14:08:24 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id LzAcxay8n3Hx for ; Tue, 8 Mar 2011 14:08:22 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by theia.denx.de (Postfix) with ESMTPS id 0E61D28084 for ; Tue, 8 Mar 2011 14:08:12 +0100 (CET) Received: from dbdp31.itg.ti.com ([172.24.170.98]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id p28D854Y029785 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 8 Mar 2011 07:08:07 -0600 Received: from localhost (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p28D84ev006441; Tue, 8 Mar 2011 18:38:05 +0530 (IST) From: Aneesh V To: u-boot@lists.denx.de Date: Tue, 8 Mar 2011 18:37:32 +0530 Message-Id: <1299589658-30896-5-git-send-email-aneesh@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1299589658-30896-1-git-send-email-aneesh@ti.com> References: <1299589658-30896-1-git-send-email-aneesh@ti.com> Cc: steve@sakoman.com Subject: [U-Boot] [PATCH v2 04/10] armv7: replace CONFIG_L2_OFF with CONFIG_SYS_NO_L2CACHE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de replace all occurences of CONFIG_L2_OFF with a more appropriate CONFIG_SYS_NO_L2CACHE CONFIG_SYS_NO_L2CACHE has been chosen to be in line with CONFIG_SYS_NO_ICACHE and CONFIG_SYS_NO_DCACHE Signed-off-by: Aneesh V --- arch/arm/cpu/armv7/cpu.c | 6 +----- include/configs/ca9x4_ct_vxp.h | 2 +- include/configs/efikamx.h | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53evk.h | 2 +- include/configs/omap4_panda.h | 2 +- include/configs/omap4_sdp4430.h | 2 +- include/configs/s5pc210_universal.h | 2 +- include/configs/tegra2-common.h | 2 +- include/configs/vision2.h | 2 +- 10 files changed, 10 insertions(+), 14 deletions(-) diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c index a01e0d6..7f28d87 100644 --- a/arch/arm/cpu/armv7/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c @@ -35,11 +35,7 @@ #include #include #include -#ifndef CONFIG_L2_OFF -#include -#endif - -static void cache_flush(void); +#include int cleanup_before_linux(void) { diff --git a/include/configs/ca9x4_ct_vxp.h b/include/configs/ca9x4_ct_vxp.h index 63f003d..bdd4e91 100644 --- a/include/configs/ca9x4_ct_vxp.h +++ b/include/configs/ca9x4_ct_vxp.h @@ -40,7 +40,7 @@ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_L2_OFF 1 +#define CONFIG_SYS_NO_L2CACHE 1 #define CONFIG_INITRD_TAG 1 /* Size of malloc() pool */ diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h index 1424347..0b64f54 100644 --- a/include/configs/efikamx.h +++ b/include/configs/efikamx.h @@ -38,7 +38,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_L2_OFF +#define CONFIG_SYS_NO_L2CACHE /* * Bootloader Components Configuration diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 591d6e1..20c299b 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -33,7 +33,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_L2_OFF +#define CONFIG_SYS_NO_L2CACHE #include /* diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index f2a5752..244a1ae 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -29,7 +29,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_L2_OFF +#define CONFIG_SYS_NO_L2CACHE #include diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 2b03b0f..8684798 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -46,7 +46,7 @@ #define CONFIG_DISPLAY_BOARDINFO 1 /* Keep L2 Cache Disabled */ -#define CONFIG_L2_OFF 1 +#define CONFIG_SYS_NO_L2CACHE 1 /* Clock Defines */ #define V_OSCK 38400000 /* Clock output from T2 */ diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index 9a8bb73..7cc0c13 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -47,7 +47,7 @@ #define CONFIG_DISPLAY_BOARDINFO 1 /* Keep L2 Cache Disabled */ -#define CONFIG_L2_OFF 1 +#define CONFIG_SYS_NO_L2CACHE 1 /* Clock Defines */ #define V_OSCK 38400000 /* Clock output from T2 */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index c033a8d..09f5cfc 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -43,7 +43,7 @@ #define CONFIG_DISPLAY_BOARDINFO /* Keep L2 Cache Disabled */ -#define CONFIG_L2_OFF 1 +#define CONFIG_SYS_NO_L2CACHE 1 #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_TEXT_BASE 0x44800000 diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h index 4f4374a..27edf68 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra2-common.h @@ -31,7 +31,7 @@ #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ #define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */ #define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */ -#define CONFIG_L2_OFF /* No L2 cache */ +#define CONFIG_SYS_NO_L2CACHE /* No L2 cache */ #include /* get chip and board defs */ diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 4c8e7fa..d6c99de 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -26,7 +26,7 @@ #define CONFIG_MX51 /* in a mx51 */ -#define CONFIG_L2_OFF +#define CONFIG_SYS_NO_L2CACHE #include