From patchwork Thu Jan 6 16:58:52 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kumar Gala X-Patchwork-Id: 77743 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 148C4B70D6 for ; Fri, 7 Jan 2011 04:00:25 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CE587281AD; Thu, 6 Jan 2011 17:59:41 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id lCdlccbTs3iI; Thu, 6 Jan 2011 17:59:41 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B7EAE281BF; Thu, 6 Jan 2011 17:59:19 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1D706281B4 for ; Thu, 6 Jan 2011 17:59:17 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5g+PxRAJ31je for ; Thu, 6 Jan 2011 17:59:16 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by theia.denx.de (Postfix) with ESMTPS id 4E31E28179 for ; Thu, 6 Jan 2011 17:59:02 +0100 (CET) Received: from localhost (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id p06Gwxaw002334; Thu, 6 Jan 2011 10:58:59 -0600 From: Kumar Gala To: u-boot@lists.denx.de Date: Thu, 6 Jan 2011 10:58:52 -0600 Message-Id: <1294333132-28592-7-git-send-email-galak@kernel.crashing.org> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <1294333132-28592-6-git-send-email-galak@kernel.crashing.org> References: <1294333132-28592-1-git-send-email-galak@kernel.crashing.org> <1294333132-28592-2-git-send-email-galak@kernel.crashing.org> <1294333132-28592-3-git-send-email-galak@kernel.crashing.org> <1294333132-28592-4-git-send-email-galak@kernel.crashing.org> <1294333132-28592-5-git-send-email-galak@kernel.crashing.org> <1294333132-28592-6-git-send-email-galak@kernel.crashing.org> Cc: Paul Gortmaker Subject: [U-Boot] [PATCH 7/7] powerpc/86xx: Convert SBC8641 to use common SRIO init code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Kumar Gala CC: Paul Gortmaker Tested-by: Paul Gortmaker --- board/sbc8641d/law.c | 1 - include/configs/sbc8641d.h | 15 +++++++++------ 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/board/sbc8641d/law.c b/board/sbc8641d/law.c index a6f60ee..14259d6 100644 --- a/board/sbc8641d/law.c +++ b/board/sbc8641d/law.c @@ -51,7 +51,6 @@ struct law_entry law_table[] = { #endif SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC), SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC), - SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO) }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 90d84eb..f425150 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -57,6 +57,9 @@ */ #define CONFIG_SYS_SCRATCH_VA 0xe8000000 +#define CONFIG_SYS_HAS_SRIO +#define CONFIG_SRIO1 /* SRIO port 1 */ + #define CONFIG_PCI 1 /* Enable PCIE */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ #define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ @@ -297,9 +300,9 @@ /* * RapidIO MMU */ -#define CONFIG_SYS_RIO_MEM_BASE 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_PHYS CONFIG_SYS_RIO_MEM_BASE -#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000 /* 128M */ +#define CONFIG_SYS_SRIO1_MEM_BASE 0xc0000000 /* base address */ +#define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BASE +#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 128M */ /* * General PCI @@ -417,10 +420,10 @@ * BAT2 512M Cache-inhibited, guarded * 0xc000_0000 512M RapidIO Memory */ -#define CONFIG_SYS_DBAT2L (CONFIG_SYS_RIO_MEM_BASE | BATL_PP_RW \ +#define CONFIG_SYS_DBAT2L (CONFIG_SYS_SRIO1_MEM_BASE | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT2U (CONFIG_SYS_RIO_MEM_BASE | BATU_BL_512M | BATU_VS | BATU_VP) -#define CONFIG_SYS_IBAT2L (CONFIG_SYS_RIO_MEM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) +#define CONFIG_SYS_DBAT2U (CONFIG_SYS_SRIO1_MEM_BASE | BATU_BL_512M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT2L (CONFIG_SYS_SRIO1_MEM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT2U CONFIG_SYS_DBAT2U /*