From patchwork Mon Jan 3 19:46:37 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Graeme Russ X-Patchwork-Id: 77324 X-Patchwork-Delegate: graeme.russ@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 12AEDB70E6 for ; Tue, 4 Jan 2011 06:50:40 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 892D92839F; Mon, 3 Jan 2011 20:49:13 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id eJFN-GpjLNzn; Mon, 3 Jan 2011 20:49:13 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C83CA28358; Mon, 3 Jan 2011 20:48:45 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9189C2831B for ; Mon, 3 Jan 2011 20:48:43 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id q5zfnUCIAdUd for ; Mon, 3 Jan 2011 20:48:43 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-fx0-f44.google.com (mail-fx0-f44.google.com [209.85.161.44]) by theia.denx.de (Postfix) with ESMTP id F1C032831C for ; Mon, 3 Jan 2011 20:48:17 +0100 (CET) Received: by mail-fx0-f44.google.com with SMTP id 9so12889169fxm.3 for ; Mon, 03 Jan 2011 11:48:16 -0800 (PST) Received: by 10.103.240.15 with SMTP id s15mr1717538mur.34.1294084096538; Mon, 03 Jan 2011 11:48:16 -0800 (PST) Received: from helios.localdomain6 (d122-104-38-246.sbr6.nsw.optusnet.com.au [122.104.38.246]) by mx.google.com with ESMTPS id a6sm3124092fak.1.2011.01.03.11.48.13 (version=SSLv3 cipher=RC4-MD5); Mon, 03 Jan 2011 11:48:15 -0800 (PST) From: Graeme Russ To: u-boot@lists.denx.de Date: Tue, 4 Jan 2011 06:46:37 +1100 Message-Id: <1294084016-2674-18-git-send-email-graeme.russ@gmail.com> X-Mailer: git-send-email 1.7.1.422.g049e9 In-Reply-To: <1294084016-2674-1-git-send-email-graeme.russ@gmail.com> References: <1294084016-2674-1-git-send-email-graeme.russ@gmail.com> Subject: [U-Boot] [RFC][PATCH 17/36] eNET - Fix eNET Interrupt Setup for Linux X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Fix minor issues with the configuration of the hardware interrupts for Linux when booting the eNET board --- board/eNET/eNET.c | 15 +++++++++------ 1 files changed, 9 insertions(+), 6 deletions(-) -- 1.7.1.422.g049e9 diff --git a/board/eNET/eNET.c b/board/eNET/eNET.c index b2f349f..3b74ce9 100644 --- a/board/eNET/eNET.c +++ b/board/eNET/eNET.c @@ -191,10 +191,18 @@ void setup_pcat_compatibility() */ writew(0x0000,&sc520_mmcr->intpinpol); - /* Set PIT 0 -> IRQ0, RTC -> IRQ8, FP error -> IRQ13 */ + /* + * PIT 0 -> IRQ0 + * RTC -> IRQ8 + * FP error -> IRQ13 + * UART1 -> IRQ4 + * UART2 -> IRQ3 + */ writeb(SC520_IRQ0, &sc520_mmcr->pit_int_map[0]); writeb(SC520_IRQ8, &sc520_mmcr->rtcmap); writeb(SC520_IRQ13, &sc520_mmcr->ferrmap); + writeb(SC520_IRQ4, &sc520_mmcr->uart_int_map[0]); + writeb(SC520_IRQ3, &sc520_mmcr->uart_int_map[1]); /* Disable all other interrupt sources */ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[0]); @@ -202,11 +210,6 @@ void setup_pcat_compatibility() writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[2]); writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pit_int_map[1]); writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pit_int_map[2]); - writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[0]); /* disable PCI INT A */ - writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[1]); /* disable PCI INT B */ - writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[2]); /* disable PCI INT C */ - writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[3]); /* disable PCI INT D */ - writeb(SC520_IRQ_DISABLED, &sc520_mmcr->dmabcintmap); /* disable DMA INT */ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->ssimap); writeb(SC520_IRQ_DISABLED, &sc520_mmcr->wdtmap); writeb(SC520_IRQ_DISABLED, &sc520_mmcr->wpvmap);