From patchwork Mon Apr 19 07:57:00 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefano Babic X-Patchwork-Id: 71768 Return-Path: X-Original-To: wd@gemini.denx.de Delivered-To: wd@gemini.denx.de Received: from diddl.denx.de (diddl.denx.de [10.0.0.6]) by gemini.denx.de (Postfix) with ESMTP id 13E23E22AD9 for ; Mon, 19 Apr 2010 10:00:10 +0200 (CEST) Received: from diddl.denx.de (localhost.localdomain [127.0.0.1]) by diddl.denx.de (Postfix) with ESMTP id 077C5C912DD7 for ; Mon, 19 Apr 2010 10:00:10 +0200 (CEST) Received: from pop.mnet-online.de by diddl.denx.de with POP3 (fetchmail-6.3.9) for (single-drop); Mon, 19 Apr 2010 10:00:10 +0200 (CEST) Received: from murder (svr19.m-online.net [192.168.3.147]) by backend2 (Cyrus v2.2.12) with LMTPA; Mon, 19 Apr 2010 09:58:53 +0200 X-Sieve: CMU Sieve 2.2 Received: from mail.m-online.net (localhost [127.0.0.1]) by frontend3.pop.m-online.net (Cyrus v2.2.13) with LMTPA; Mon, 19 Apr 2010 09:58:53 +0200 Received: from scanner-4.m-online.net (scanner-4.m-online.net [192.168.1.18]) by mail.m-online.net (Postfix) with ESMTP id 5B91A200113; Mon, 19 Apr 2010 09:58:53 +0200 (CEST) Received: from mxin-1.m-online.net ([192.168.6.164]) by scanner-4.m-online.net (scanner-4.m-online.net [192.168.1.18]) (amavisd-new, port 10026) with ESMTP id 02118-03; Mon, 19 Apr 2010 09:58:51 +0200 (CEST) Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by mxin-1.m-online.net (Postfix) with ESMTP id E939D46C0AC; Mon, 19 Apr 2010 09:58:50 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A32A4280A9; Mon, 19 Apr 2010 09:58:06 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KEvTV78YePW1; Mon, 19 Apr 2010 09:58:06 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DE1D628085; Mon, 19 Apr 2010 09:57:58 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0DF642809F for ; Mon, 19 Apr 2010 09:57:56 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id f7PPA9vu+7f5 for ; Mon, 19 Apr 2010 09:57:54 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtpout31.attiva.biz (smtpout31.attiva.biz [88.44.63.37]) by theia.denx.de (Postfix) with ESMTP id 0A2D0280A4 for ; Mon, 19 Apr 2010 09:57:47 +0200 (CEST) Received: from FBCMFE02B06.fbc.local ([192.168.30.94]) by smtpout31.attiva.biz with Microsoft SMTPSVC(6.0.3790.3959); Mon, 19 Apr 2010 09:57:46 +0200 Received: from superpapero.babic.homelinux.org ([81.74.56.14]) by FBCMFE02B06.fbc.local with Microsoft SMTPSVC(6.0.3790.3959); Mon, 19 Apr 2010 09:57:36 +0200 Received: from localhost.localdomain (unknown [192.168.2.236]) by superpapero.babic.homelinux.org (Postfix) with ESMTP id 9582516E0002; Mon, 19 Apr 2010 09:57:35 +0200 (CEST) From: Stefano Babic To: u-boot@lists.denx.de Date: Mon, 19 Apr 2010 09:57:00 +0200 Message-Id: <1271663820-7358-6-git-send-email-sbabic@denx.de> X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <1271663820-7358-5-git-send-email-sbabic@denx.de> References: <1268756287-2030-1-git-send-email-sbabic@denx.de> <1271663820-7358-1-git-send-email-sbabic@denx.de> <1271663820-7358-2-git-send-email-sbabic@denx.de> <1271663820-7358-3-git-send-email-sbabic@denx.de> <1271663820-7358-4-git-send-email-sbabic@denx.de> <1271663820-7358-5-git-send-email-sbabic@denx.de> X-OriginalArrivalTime: 19 Apr 2010 07:57:36.0504 (UTC) FILETIME=[F9A67F80:01CADF95] Subject: [U-Boot] [PATCH V2 6/6] Add SPI support to mx51evk board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de X-Virus-Scanned: by amavisd-new at m-online.net The patch adds SPI devices to the mx51evk board. The MC13892 chip (PMIC) is supported. Signed-off-by: Stefano Babic --- Version 2 of the patch is rearranged due to changes in the mxc_spi driver. Other changes: Comments by Tom Rix: - Atmel SPI flash is not supported - removed - Removed unneded define inside C file - Replaced all hard-coded values with an or-ing of bit board/freescale/mx51evk/mx51evk.c | 139 +++++++++++++++++++++++++++++++++++++ include/configs/mx51evk.h | 15 ++++ 2 files changed, 154 insertions(+), 0 deletions(-) diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index f0b7abc..e9f01f6 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -27,9 +27,12 @@ #include #include #include +#include #include #include #include +#include +#include #include "mx51evk.h" DECLARE_GLOBAL_DATA_PTR; @@ -147,6 +150,130 @@ static void setup_iomux_fec(void) mxc_iomux_set_pad(MX51_PIN_NANDF_D11, 0x2180); } +#ifdef CONFIG_MXC_SPI +static void setup_iomux_spi(void) +{ + /* 000: Select mux mode: ALT0 mux port: MOSI of instance: ecspi1 */ + mxc_request_iomux(MX51_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_MOSI, 0x105); + + /* 000: Select mux mode: ALT0 mux port: MISO of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_MISO, 0x105); + + /* de-select SS1 of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS1, 0x85); + + /* 000: Select mux mode: ALT0 mux port: SS0 ecspi1 */ + mxc_request_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0, 0x185); + + /* 000: Select mux mode: ALT0 mux port: RDY of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_RDY, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_RDY, 0x180); + + /* 000: Select mux mode: ALT0 mux port: SCLK of instance: ecspi1. */ + mxc_request_iomux(MX51_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SCLK, 0x105); +} +#endif + +static void power_init(void) +{ + unsigned int val; + unsigned int reg; + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE; + + /* Write needed to Power Gate 2 register */ + val = pmic_reg_read(REG_POWER_MISC); + val &= ~PWGT2SPIEN; + pmic_reg_write(REG_POWER_MISC, val); + + /* Write needed to update Charger 0 */ + pmic_reg_write(REG_CHARGE, VCHRG0 | VCHRG1 | VCHRG2 | + ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | ICHRGTR0 | + OVCTRL1 | UCHEN | CHRGLEDEN | CYCLB); + + /* power up the system first */ + pmic_reg_write(REG_POWER_MISC, PWUP); + + /* Set core voltage to 1.1V */ + val = pmic_reg_read(REG_SW_0); + val = (val & (~0x1F)) | 0x14; + pmic_reg_write(REG_SW_0, val); + + /* Setup VCC (SW2) to 1.25 */ + val = pmic_reg_read(REG_SW_1); + val = (val & (~0x1F)) | 0x1A; + pmic_reg_write(REG_SW_1, val); + + /* Setup 1V2_DIG1 (SW3) to 1.25 */ + val = pmic_reg_read(REG_SW_2); + val = (val & (~0x1F)) | 0x1A; + pmic_reg_write(REG_SW_2, val); + udelay(50); + + /* Raise the core frequency to 800MHz */ + writel(0x0, &mxc_ccm->cacrr); + + /* Set switchers in Auto in NORMAL mode & STANDBY mode */ + /* Setup the switcher mode for SW1 & SW2*/ + val = pmic_reg_read(REG_SW_4); + val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) | + (SWMODE_MASK << SWMODE2_SHIFT))); + val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) | + (SWMODE_AUTO_AUTO << SWMODE2_SHIFT); + pmic_reg_write(REG_SW_4, val); + + /* Setup the switcher mode for SW3 & SW4 */ + val = pmic_reg_read(REG_SW_5); + val = (val & ~((SWMODE_MASK << SWMODE3_SHIFT) | + (SWMODE_MASK << SWMODE4_SHIFT))); + val |= (SWMODE_AUTO_AUTO << SWMODE3_SHIFT) | + (SWMODE_AUTO_AUTO << SWMODE4_SHIFT); + pmic_reg_write(REG_SW_5, val); + + /* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.6V */ + val = pmic_reg_read(REG_SETTING_0); + val &= ~(VCAM_MASK | VGEN3_MASK | VDIG_MASK); + val |= VDIG_1_65 | VGEN3_1_8 | VCAM_2_6; + pmic_reg_write(REG_SETTING_0, val); + + /* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */ + val = pmic_reg_read(REG_SETTING_1); + val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK); + val |= VSD_3_15 | VAUDIO_3_0 | VVIDEO_2_775; + pmic_reg_write(REG_SETTING_1, val); + + /* Configure VGEN3 and VCAM regulators to use external PNP */ + val = VGEN3CONFIG | VCAMCONFIG; + pmic_reg_write(REG_MODE_1, val); + udelay(200); + + reg = readl(GPIO2_BASE_ADDR + 0x0); + reg &= ~0x4000; /* Lower reset line */ + writel(reg, GPIO2_BASE_ADDR + 0x0); + + reg = readl(GPIO2_BASE_ADDR + 0x4); + reg |= 0x4000; /* configure GPIO lines as output */ + writel(reg, GPIO2_BASE_ADDR + 0x4); + + /* Reset the ethernet controller over GPIO */ + writel(0x1, IOMUXC_BASE_ADDR + 0x0AC); + + /* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */ + val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG | + VVIDEOEN | VAUDIOEN | VSDEN; + pmic_reg_write(REG_MODE_1, val); + + udelay(500); + + reg = readl(GPIO2_BASE_ADDR + 0x0); + reg |= 0x4000; + writel(reg, GPIO2_BASE_ADDR + 0x0); +} + #ifdef CONFIG_FSL_ESDHC int board_mmc_getcd(u8 *cd, struct mmc *mmc) { @@ -284,9 +411,21 @@ int board_init(void) setup_iomux_uart(); setup_iomux_fec(); + return 0; } +#ifdef BOARD_LATE_INIT +int board_late_init(void) +{ +#ifdef CONFIG_MXC_SPI + setup_iomux_spi(); + power_init(); +#endif + return 0; +} +#endif + int checkboard(void) { puts("Board: MX51EVK "); diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 3626df7..86a4731 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -54,6 +54,8 @@ /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128 +#define BOARD_LATE_INIT + /* * Hardware drivers */ @@ -61,6 +63,19 @@ #define CONFIG_SYS_MX51_UART1 /* + * SPI Configs + * */ +#define CONFIG_CMD_SPI + +#define CONFIG_MXC_SPI + +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_BUS 0 +#define CONFIG_FSL_PMIC_CS 0 +#define CONFIG_FSL_PMIC_CLK 2500000 +#define CONFIG_FSL_PMIC_MODE (SPI_CPOL | SPI_CS_HIGH) + +/* * MMC Configs * */ #define CONFIG_FSL_ESDHC