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[U-Boot,33/40] arm64: zynqmp: Add support reading SoC revision using nvmem driver in dwc3

Message ID 04b47936158a32ca057168148c374003c9853df1.1509970359.git.michal.simek@xilinx.com
State Accepted
Commit 8e5a4e6f0ec7d475fc32b7f8083c9aefb9723fad
Delegated to: Michal Simek
Headers show
Series zynqmp: arm64: DT changes | expand

Commit Message

Michal Simek Nov. 6, 2017, 12:13 p.m. UTC 
From: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>

This patch adds support for reading silicon revision using zynqmp nvmem
driver.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm/dts/zynqmp.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
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Patch

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 10a53bb9f049..dce5da4e06e5 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -1022,6 +1022,8 @@ 
 			iommus = <&smmu 0x860>;
 			power-domains = <&pd_usb0>;
 			ranges;
+			nvmem-cells = <&soc_revision>;
+			nvmem-cell-names = "soc_revision";
 
 			dwc3_0: dwc3@fe200000 {
 				compatible = "snps,dwc3";
@@ -1045,6 +1047,8 @@ 
 			iommus = <&smmu 0x861>;
 			power-domains = <&pd_usb1>;
 			ranges;
+			nvmem-cells = <&soc_revision>;
+			nvmem-cell-names = "soc_revision";
 
 			dwc3_1: dwc3@fe300000 {
 				compatible = "snps,dwc3";