Show patches with: Submitter = Pragnesh Patel       |    State = Action Required       |    Archived = No       |   21 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[2/2] riscv: sifive: fu540: Enable SiFive PWM driver Enable all cache ways and Enable SiFive PWM driver - - - - --- 2020-05-29 Pragnesh Patel Andes New
[1/2] riscv: sifive: fu540: enable all cache ways from U-Boot proper Enable all cache ways and Enable SiFive PWM driver - - 1 1 --- 2020-05-29 Pragnesh Patel Andes New
[v13,19/19] doc: sifive: fu540: Add description for OpenSBI generic platform RISC-V SiFive FU540 support SPL - - 2 - --- 2020-05-29 Pragnesh Patel Andes New
[v13,18/19] configs: fu540: Add config options for U-Boot SPL RISC-V SiFive FU540 support SPL - - 2 - --- 2020-05-29 Pragnesh Patel Andes New
[v13,17/19] sifive: fu540: Add U-Boot proper sector start RISC-V SiFive FU540 support SPL - - 2 - --- 2020-05-29 Pragnesh Patel Andes New
[v13,16/19] sifive: fu540: Add sample SD gpt partition layout RISC-V SiFive FU540 support SPL - - 2 - --- 2020-05-29 Pragnesh Patel Andes New
[v13,15/19] riscv: sifive: fu540: add SPL configuration RISC-V SiFive FU540 support SPL - - 2 2 --- 2020-05-29 Pragnesh Patel Andes New
[v13,14/19] riscv: cpu: fu540: Add support for cpu fu540 RISC-V SiFive FU540 support SPL - - 2 2 --- 2020-05-29 Pragnesh Patel Andes New
[v13,13/19] riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux RISC-V SiFive FU540 support SPL - - 2 1 --- 2020-05-29 Pragnesh Patel Andes New
[v13,12/19] riscv: sifive: dts: fu540: set ethernet clock rate RISC-V SiFive FU540 support SPL - - - 1 --- 2020-05-29 Pragnesh Patel Andes New
[v13,11/19] clk: sifive: fu540-prci: Release ethernet clock reset RISC-V SiFive FU540 support SPL - - 1 1 --- 2020-05-29 Pragnesh Patel Andes New
[v13,10/19] clk: sifive: fu540-prci: Add ddr clock initialization RISC-V SiFive FU540 support SPL - - 2 2 --- 2020-05-29 Pragnesh Patel Andes New
[v13,09/19] clk: sifive: fu540-prci: Add clock enable and disable ops RISC-V SiFive FU540 support SPL 1 - 1 2 --- 2020-05-29 Pragnesh Patel Andes New
[v13,08/19] riscv: sifive: dts: fu540: add U-Boot dmc node RISC-V SiFive FU540 support SPL - - 2 2 --- 2020-05-29 Pragnesh Patel Andes New
[v13,07/19] sifive: dts: fu540: Add DDR controller and phy register settings RISC-V SiFive FU540 support SPL - - 1 2 --- 2020-05-29 Pragnesh Patel Andes New
[v13,06/19] sifive: fu540: add ddr driver RISC-V SiFive FU540 support SPL - - - 1 --- 2020-05-29 Pragnesh Patel Andes New
[v13,05/19] riscv: sifive: dts: fu540: Add board -u-boot.dtsi files RISC-V SiFive FU540 support SPL - - 3 2 --- 2020-05-29 Pragnesh Patel Andes New
[v13,04/19] lib: Makefile: build crc7.c when CONFIG_MMC_SPI RISC-V SiFive FU540 support SPL 1 - 2 - --- 2020-05-29 Pragnesh Patel Andes New
[v13,03/19] riscv: Add _image_binary_end for SPL RISC-V SiFive FU540 support SPL - - 3 2 --- 2020-05-29 Pragnesh Patel Andes New
[v13,02/19] riscv: sifive: fu540: Use OTP DM driver for serial environment variable RISC-V SiFive FU540 support SPL - - 2 2 --- 2020-05-29 Pragnesh Patel Andes New
[v13,01/19] misc: add driver for the SiFive otp controller RISC-V SiFive FU540 support SPL - - 2 2 --- 2020-05-29 Pragnesh Patel Andes New