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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
riscv: timer: Add support for an early timer riscv: timer: Add support for an early timer - - - - --- 2020-11-17 Pragnesh Patel Andes New
[3/3] riscv: Complete efi header for RV32/64 Complete Optional Header fields in EFI header - - 2 - --- 2020-11-17 Leo Liang Andes New
[2/3] riscv: Fix efi header size for RV32 Complete Optional Header fields in EFI header - - - - --- 2020-11-17 Leo Liang Andes New
[1/3] riscv: Fix efi header for RV32 Complete Optional Header fields in EFI header - - 2 - --- 2020-11-17 Leo Liang Andes New
[v2,2/2] pinctrl: k210: Rename power domains to match datasheet [v2,1/2] pinctrl: k210: Fix inverted IE and OE for I2C - - 1 - --- 2020-11-13 Sean Anderson Andes Accepted
[v2,1/2] pinctrl: k210: Fix inverted IE and OE for I2C [v2,1/2] pinctrl: k210: Fix inverted IE and OE for I2C - - - - --- 2020-11-13 Sean Anderson Andes Accepted
riscv: fix the wrong swap value register riscv: fix the wrong swap value register - - 3 - --- 2020-11-13 Brad Kim Andes New
[1/1] riscv: Fix efi header size for RV32 [1/1] riscv: Fix efi header size for RV32 - - - - --- 2020-11-12 Leo Liang Andes Superseded
[v3,1/1] riscv: Add timer_get_us() for tracing RISC-V tracing support - - - - --- 2020-11-11 Pragnesh Patel Andes New
[v3,7/7] doc: board: Add Microchip MPFS Icicle Kit doc Microchip PolarFire SoC support - - 1 - --- 2020-11-10 Padmarao Begari Andes New
[v3,6/7] riscv: Add Microchip MPFS Icicle Kit support Microchip PolarFire SoC support - - 1 - --- 2020-11-10 Padmarao Begari Andes New
[v3,5/7] riscv: dts: Add device tree for Microchip Icicle Kit Microchip PolarFire SoC support - - 1 - --- 2020-11-10 Padmarao Begari Andes New
[v3,4/7] clk: Add Microchip PolarFire SoC clock driver Microchip PolarFire SoC support - - 1 - --- 2020-11-10 Padmarao Begari Andes New
[v3,3/7] net: macb: Add phy address to read it from device tree Microchip PolarFire SoC support - - 1 - --- 2020-11-10 Padmarao Begari Andes New
[v3,2/7] net: macb: Add DMA 64-bit address support for macb Microchip PolarFire SoC support - - 1 - --- 2020-11-10 Padmarao Begari Andes New
[v3,1/7] riscv: Add DMA 64-bit address support Microchip PolarFire SoC support - - 1 - --- 2020-11-10 Padmarao Begari Andes New
[RESEND,v2,1/1] riscv: Add timer_get_us() for tracing RISC-V tracing support - - - - --- 2020-11-05 Pragnesh Patel Andes New
[v2] riscv: Add timer_get_us() for tracing [v2] riscv: Add timer_get_us() for tracing - - - - --- 2020-11-05 Pragnesh Patel Andes Superseded
riscv: Fix ax25-ae350 and qemu-riscv Kconfig dependency riscv: Fix ax25-ae350 and qemu-riscv Kconfig dependency - - - - --- 2020-11-05 Bin Meng Andes Rejected
[1/1] doc: qemu-riscv: describe attaching a disk image [1/1] doc: qemu-riscv: describe attaching a disk image - - 1 - --- 2020-11-04 Heinrich Schuchardt Andes Accepted
[v2,2/2] riscv: enable SATA disk on QEMU RISC-V riscv: enable SATA disk on QEMU RISC-V - - 1 - --- 2020-11-04 Heinrich Schuchardt Andes Accepted
[v2,1/2] riscv: sort SPECIFIC_OPTIONS riscv: enable SATA disk on QEMU RISC-V - - 1 - --- 2020-11-04 Heinrich Schuchardt Andes Accepted
[1/1] riscv: enable SATA disk on qemu-riscv64_defconfig [1/1] riscv: enable SATA disk on qemu-riscv64_defconfig - - 1 - --- 2020-11-02 Heinrich Schuchardt Andes Changes Requested
[v2,3/3] riscv: Move timer portions of SiFive CLINT to drivers/timer riscv: Move timers into drivers/timer - - 2 - --- 2020-10-26 Sean Anderson Andes Accepted
[v2,2/3] timer: Add _TIMER suffix to Andes PLMT Kconfig riscv: Move timers into drivers/timer - - 2 - --- 2020-10-26 Sean Anderson Andes Accepted
[v2,1/3] riscv: Move Andes PLMT driver to drivers/timer riscv: Move timers into drivers/timer - - 2 - --- 2020-10-26 Sean Anderson Andes Accepted
[2/2] pinctrl: k210: Rename power domains to match datasheet [1/2] pinctrl: k210: Fix inverted IE and OE for I2C - - 1 - --- 2020-10-25 Sean Anderson Andes Superseded
[1/2] pinctrl: k210: Fix inverted IE and OE for I2C [1/2] pinctrl: k210: Fix inverted IE and OE for I2C - - 1 - --- 2020-10-25 Sean Anderson Andes Superseded
[v2,7/7] doc: board: Add Microchip MPFS Icicle Kit doc Microchip PolarFire SoC support - - - - --- 2020-10-22 Padmarao Begari Andes Superseded
[v2,6/7] riscv: Add Microchip MPFS Icicle Kit support Microchip PolarFire SoC support - - 1 - --- 2020-10-22 Padmarao Begari Andes Superseded
[v2,5/7] riscv: dts: Add device tree for Microchip Icicle Kit Microchip PolarFire SoC support - - 1 - --- 2020-10-22 Padmarao Begari Andes Superseded
[v2,4/7] clk: Add Microchip PolarFire SoC clock driver Microchip PolarFire SoC support - - 1 - --- 2020-10-22 Padmarao Begari Andes Superseded
[v2,3/7] net: macb: Add phy address to read it from device tree Microchip PolarFire SoC support - - - - --- 2020-10-22 Padmarao Begari Andes Superseded
[v2,2/7] net: macb: Add DMA 64-bit address support for macb Microchip PolarFire SoC support - - - - --- 2020-10-22 Padmarao Begari Andes Superseded
[v2,1/7] riscv: Add DMA 64-bit address support Microchip PolarFire SoC support - - 1 - --- 2020-10-22 Padmarao Begari Andes Superseded
riscv: fu540: dts: Correct reg size of clint node riscv: fu540: dts: Correct reg size of clint node - - 2 - --- 2020-10-20 Pragnesh Patel Andes Accepted
[v1,8/8] doc: board: Add Microchip MPFS Icicle Kit doc Microchip PolarFire SoC support - - - - --- 2020-10-16 Padmarao Begari Andes Superseded
[v1,7/8] clk: Add Microchip PolarFire SoC clock driver Microchip PolarFire SoC support - - - - --- 2020-10-16 Padmarao Begari Andes Superseded
[v1,6/8] net: macb: Add phy address to read it from device tree Microchip PolarFire SoC support - - - - --- 2020-10-16 Padmarao Begari Andes Superseded
[v1,5/8] net: macb: Add DMA 64-bit address support for macb Microchip PolarFire SoC support - - - - --- 2020-10-16 Padmarao Begari Andes Superseded
[v1,4/8] riscv: Add DMA 64-bit address support Microchip PolarFire SoC support - - - - --- 2020-10-16 Padmarao Begari Andes Superseded
[v1,3/8] dt-bindings: clock: Add indexes for reset signals Microchip PolarFire SoC support - - - - --- 2020-10-16 Padmarao Begari Andes Superseded
[v1,2/8] riscv: dts: Add device tree for Microchip Icicle Kit Microchip PolarFire SoC support - - - - --- 2020-10-16 Padmarao Begari Andes Superseded
[v1,1/8] riscv: Add Microchip MPFS Icicle Kit support Microchip PolarFire SoC support - - - - --- 2020-10-16 Padmarao Begari Andes Superseded
riscv: Fix efi header for RV32 riscv: Fix efi header for RV32 - - 2 - --- 2020-10-13 Atish Patra Andes New
riscv: k210: Reduce DMA block size riscv: k210: Reduce DMA block size - - 1 - --- 2020-10-12 Sean Anderson Andes Accepted
[v2,16/16] riscv: Don't reserve AI ram in k210 dts riscv: k210: Enable use of AI ram bank - - - - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,15/16] riscv: k210: Use AI as the parent clock of aisram, not PLL1 riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,14/16] riscv: k210: Rename airam to aisram riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,13/16] riscv: Enable AI ram on K210 riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,12/16] riscv: Probe ram in dram_init riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,11/16] ram: sifive: Default to y only if compiling for fu540 riscv: k210: Enable use of AI ram bank - - 2 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,10/16] ram: Add driver for K210 SRAM riscv: k210: Enable use of AI ram bank - - 2 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,09/16] test: Add a test for fdtdec_setup_mem_size_base et al. riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,08/16] lib: fdt: Add fdtdec_setup_mem_size_base_highest riscv: k210: Enable use of AI ram bank - - 2 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,07/16] riscv: Enable some devices pre-relocation riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,06/16] clk: Add support for the k210 clock driver pre-relocation riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,05/16] clk: k210: Move the clint clock to under aclk riscv: k210: Enable use of AI ram bank - - - - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,04/16] clk: k210: Remove k210_register_pll riscv: k210: Enable use of AI ram bank - - - - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,03/16] clk: k210: Remove bypass clock riscv: k210: Enable use of AI ram bank - - - - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,02/16] clk: k210: Fix PLL enable always getting taken riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-10-12 Sean Anderson Andes Superseded
[v2,01/16] clk: k210: Fix PLLs not being enabled riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-10-12 Sean Anderson Andes Superseded
[3/3] riscv: Move timer portions of SiFive CLINT to drivers/timer riscv: Move timers into drivers/timer - - 2 - --- 2020-10-04 Sean Anderson Andes Accepted
[2/3] timer: Add _TIMER suffix to Andes PLMT Kconfig riscv: Move timers into drivers/timer - - 2 - --- 2020-10-04 Sean Anderson Andes Accepted
[1/3] riscv: Move Andes PLMT driver to drivers/timer riscv: Move timers into drivers/timer - - 2 - --- 2020-10-04 Sean Anderson Andes Accepted
[1/1] clk: kendryte: no need to check argument of free() [1/1] clk: kendryte: no need to check argument of free() - - 1 - --- 2020-09-29 Heinrich Schuchardt Andes Accepted
[10/10] riscv: Don't reserve AI ram in k210 dts riscv: k210: Enable use of AI ram bank - - - - --- 2020-09-29 Sean Anderson Andes Superseded
[09/10] riscv: Enable AI ram on K210 riscv: k210: Enable use of AI ram bank - - - - --- 2020-09-29 Sean Anderson Andes Superseded
[08/10] riscv: Probe ram in dram_init riscv: k210: Enable use of AI ram bank - - - - --- 2020-09-29 Sean Anderson Andes Superseded
[07/10] ram: sifive: Default to y only if compiling for fu540 riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-09-29 Sean Anderson Andes Superseded
[06/10] ram: Add driver for K210 SRAM riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-09-29 Sean Anderson Andes Superseded
[05/10] test: Add a test for fdtdec_setup_mem_size_base et al. riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-09-29 Sean Anderson Andes Superseded
[04/10] lib: fdt: Add fdtdec_setup_mem_size_base_highest riscv: k210: Enable use of AI ram bank - - 1 - --- 2020-09-29 Sean Anderson Andes Superseded
[03/10] riscv: Enable some devices pre-relocation riscv: k210: Enable use of AI ram bank - - - - --- 2020-09-29 Sean Anderson Andes Superseded
[02/10] clk: Add support for the k210 clock driver pre-relocation riscv: k210: Enable use of AI ram bank - - - - --- 2020-09-29 Sean Anderson Andes Superseded
[01/10] clk: k210: Fix PLLs not being enabled riscv: k210: Enable use of AI ram bank - - - - --- 2020-09-29 Sean Anderson Andes Superseded
[v6,9/9] riscv: Update SiFive device tree for new CLINT driver riscv: Clean up timer drivers - - 2 - --- 2020-09-28 Sean Anderson Andes Accepted
[v6,8/9] riscv: Update Kendryte device tree for new CLINT driver riscv: Clean up timer drivers - - 1 - --- 2020-09-28 Sean Anderson Andes Accepted
[v6,7/9] riscv: clk: Add CLINT clock to kendryte clock driver riscv: Clean up timer drivers - - - - --- 2020-09-28 Sean Anderson Andes Accepted
[v6,6/9] riscv: Rework Sifive CLINT as UCLASS_TIMER driver riscv: Clean up timer drivers - - 1 - --- 2020-09-28 Sean Anderson Andes Accepted
[v6,5/9] riscv: Clean up initialization in Andes PLIC riscv: Clean up timer drivers - - 1 - --- 2020-09-28 Sean Anderson Andes Accepted
[v6,4/9] riscv: Rework Andes PLMT as a UCLASS_TIMER driver riscv: Clean up timer drivers - - 1 - --- 2020-09-28 Sean Anderson Andes Accepted
[v6,3/9] timer: Add a test for timer_timebase_fallback riscv: Clean up timer drivers - - 1 - --- 2020-09-28 Sean Anderson Andes Accepted
[v6,2/9] timer: Add helper for drivers using timebase fallback riscv: Clean up timer drivers - - 3 - --- 2020-09-28 Sean Anderson Andes Accepted
[v6,1/9] riscv: Rework riscv timer driver to only support S-mode riscv: Clean up timer drivers - - 2 - --- 2020-09-28 Sean Anderson Andes Accepted
[v2,1/1] riscv: restore global data pointer in trap handler [v2,1/1] riscv: restore global data pointer in trap handler - - 2 - --- 2020-09-27 Heinrich Schuchardt Andes Accepted
[v2,1/1] riscv: reset after crash [v2,1/1] riscv: reset after crash - - 1 - --- 2020-09-26 Heinrich Schuchardt Andes New
[1/1] riscv: restore global data pointer in trap handler [1/1] riscv: restore global data pointer in trap handler - - - - --- 2020-09-26 Heinrich Schuchardt Andes Superseded
[v3,7/7] riscv: Add some comments to start.S riscv: Correctly handle IPIs already pending upon boot - - 3 - --- 2020-09-21 Sean Anderson Andes Accepted
[v3,6/7] riscv: Ensure gp is NULL or points to valid data riscv: Correctly handle IPIs already pending upon boot - 1 2 - --- 2020-09-21 Sean Anderson Andes Accepted
[v3,5/7] riscv: Consolidate fences into AMOs for available_harts_lock riscv: Correctly handle IPIs already pending upon boot - - 2 - --- 2020-09-21 Sean Anderson Andes Accepted
[v3,4/7] riscv: Clear pending IPIs on initialization riscv: Correctly handle IPIs already pending upon boot - - 2 - --- 2020-09-21 Sean Anderson Andes Accepted
[v3,3/7] riscv: Use a valid bit to ignore already-pending IPIs riscv: Correctly handle IPIs already pending upon boot - - 3 - --- 2020-09-21 Sean Anderson Andes Accepted
[v3,2/7] riscv: Match memory barriers between send_ipi_many and handle_ipi riscv: Correctly handle IPIs already pending upon boot - 1 3 - --- 2020-09-21 Sean Anderson Andes Accepted
[v3,1/7] Revert "riscv: Clear pending interrupts before enabling IPIs" riscv: Correctly handle IPIs already pending upon boot - - 2 - --- 2020-09-21 Sean Anderson Andes Accepted
[v5,9/9] riscv: Update SiFive device tree for new CLINT driver riscv: Clean up timer drivers - - 2 - --- 2020-09-15 Sean Anderson Andes Superseded
[v5,8/9] riscv: Update Kendryte device tree for new CLINT driver riscv: Clean up timer drivers - - 1 - --- 2020-09-15 Sean Anderson Andes Superseded
[v5,7/9] riscv: clk: Add CLINT clock to kendryte clock driver riscv: Clean up timer drivers - - - - --- 2020-09-15 Sean Anderson Andes Superseded
[v5,6/9] riscv: Rework Sifive CLINT as UCLASS_TIMER driver riscv: Clean up timer drivers - - 1 - --- 2020-09-15 Sean Anderson Andes Superseded
[v5,5/9] riscv: Clean up initialization in Andes PLIC riscv: Clean up timer drivers - - 1 - --- 2020-09-15 Sean Anderson Andes Superseded
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