Show patches with: Archived = No       |   167482 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[1/1] riscv: set fdtfile on VisionFive 2 [1/1] riscv: set fdtfile on VisionFive 2 - - 1 1 --- 2023-09-07 Heinrich Schuchardt Andes Accepted
[v3,3/3] timer: riscv_aclint_timer: add timer_get_boot_us for BOOTSTAGE bootstage support for risc-v - - 1 - --- 2023-09-06 Chanho Park Andes Accepted
[v3,2/3] riscv: timer: add timer_get_boot_us for BOOTSTAGE bootstage support for risc-v - - 1 - --- 2023-09-06 Chanho Park Andes Accepted
[v3,1/3] riscv: bootstage: correct bootstage_report guard bootstage support for risc-v - - 1 - --- 2023-09-06 Chanho Park Andes Accepted
[[PATCH,v2] ] riscv: add backtrace support [[PATCH,v2] ] riscv: add backtrace support - - - 1 --- 2023-09-05 Ben Dooks Andes Accepted
riscv: enable multi-range memory layout riscv: enable multi-range memory layout - - - - --- 2023-09-05 Wu, Fei Andes Superseded
[v2,2/2] risc-v: implement DBCN based debug console risc-v: implement DBCN based debug console - - 1 - --- 2023-09-04 Heinrich Schuchardt Andes Accepted
[v2,1/2] risc-v: implement DBCN write byte risc-v: implement DBCN based debug console - - 1 - --- 2023-09-04 Heinrich Schuchardt Andes Accepted
spl: add __noreturn attribute to spl_invoke_opensbi function spl: add __noreturn attribute to spl_invoke_opensbi function - - 1 - --- 2023-08-29 Chanho Park Andes Accepted
[v2,3/3] timer: riscv_aclint_timer: add timer_get_boot_us for BOOTSTAGE bootstage support for risc-v - - - - --- 2023-08-28 Chanho Park Andes Changes Requested
[v2,2/3] riscv: timer: add timer_get_boot_us for BOOTSTAGE bootstage support for risc-v - - - - --- 2023-08-28 Chanho Park Andes Changes Requested
[v2,1/3] riscv: bootstage: correct bootstage_report guard bootstage support for risc-v - - 1 - --- 2023-08-28 Chanho Park Andes Changes Requested
spl: bootstage: move bootstage_stash before jumping to image spl: bootstage: move bootstage_stash before jumping to image - - - - --- 2023-08-28 Chanho Park Andes Superseded
[v6,4/4] configs: starfive: Disable SYS_MALLOC_CLEAR_ON_INIT by default arch: riscv: jh7110: Correctly zero L2 LIM - - 1 - --- 2023-08-24 Shengyu Qu Andes Accepted
[v6,3/4] riscv: cpu: jh7110: Imply SPL_SYS_MALLOC_CLEAR_ON_INIT arch: riscv: jh7110: Correctly zero L2 LIM - - 1 - --- 2023-08-24 Shengyu Qu Andes Accepted
[v6,2/4] dlmalloc: Add support for SPL_SYS_MALLOC_CLEAR_ON_INIT arch: riscv: jh7110: Correctly zero L2 LIM - - 1 - --- 2023-08-24 Shengyu Qu Andes Accepted
[v6,1/4] Kconfig: Add SPL_SYS_MALLOC_CLEAR_ON_INIT arch: riscv: jh7110: Correctly zero L2 LIM - - 1 - --- 2023-08-24 Shengyu Qu Andes Accepted
[v5,3/3] riscv: cpu: jh7110: Imply SPL_SYS_MALLOC_CLEAR_ON_INIT arch: riscv: jh7110: Correctly zero L2 LIM - - - - --- 2023-08-23 Shengyu Qu Andes Changes Requested
[v5,2/3] dlmalloc: Add support for SPL_SYS_MALLOC_CLEAR_ON_INIT arch: riscv: jh7110: Correctly zero L2 LIM - - 1 - --- 2023-08-23 Shengyu Qu Andes Changes Requested
[v5,1/3] Kconfig: Add SPL_SYS_MALLOC_CLEAR_ON_INIT arch: riscv: jh7110: Correctly zero L2 LIM - - - - --- 2023-08-23 Shengyu Qu Andes Changes Requested
[v1,2/2] doc: board: starfive: Add more info about supported driver Enable PCIE and USB by default on Visionfive 2 - - - 2 --- 2023-08-22 Shengyu Qu Andes Accepted
[v1,1/2] configs: starfive: Enable PCIE auto enum and NVME/USB stuff for Starfive Visionfive 2 Enable PCIE and USB by default on Visionfive 2 - - - 2 --- 2023-08-22 Shengyu Qu Andes Accepted
[3/3] timer: riscv_aclint_timer: add timer_get_boot_us for BOOTSTAGE bootstage support for risc-v - - - - --- 2023-08-21 Chanho Park Andes Superseded
[2/3] riscv: timer: add timer_get_boot_us for BOOTSTAGE bootstage support for risc-v - - - - --- 2023-08-21 Chanho Park Andes Superseded
[1/3] riscv: bootstage: correct bootstage_report guard bootstage support for risc-v - - - - --- 2023-08-21 Chanho Park Andes Superseded
[2/2] riscv: jh7110: enable riscv,timer in the device tree riscv: jh7110: visionfive2: fix u-boot crash due to missing timer - - 1 - --- 2023-08-14 Torsten Duwe Andes Accepted
[1/2] riscv: allow riscv timer to be instantiated via device tree riscv: jh7110: visionfive2: fix u-boot crash due to missing timer - - 1 - --- 2023-08-14 Torsten Duwe Andes Accepted
eeprom: starfive: set eth0 mac address properly eeprom: starfive: set eth0 mac address properly - - 1 - --- 2023-08-11 Seung-Woo Kim Andes Accepted
[v4,3/3] riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE arch: riscv: jh7110: Correctly zero L2 LIM - - 1 - --- 2023-08-09 Shengyu Qu Andes Accepted
[v4,2/3] riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation arch: riscv: jh7110: Correctly zero L2 LIM - - 1 - --- 2023-08-09 Shengyu Qu Andes Accepted
[v4,1/3] riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE arch: riscv: jh7110: Correctly zero L2 LIM - - 1 - --- 2023-08-09 Shengyu Qu Andes Accepted
riscv: Add Zbb support for building U-Boot riscv: Add Zbb support for building U-Boot - - 1 - --- 2023-08-09 Yu Chien Peter Lin Andes Accepted
[v1] configs: starfive: Enable environment in SPI flash support [v1] configs: starfive: Enable environment in SPI flash support - - 1 - --- 2023-08-08 Shengyu Qu Andes Accepted
[v3,3/3] riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE arch: riscv: jh7110: Correctly zero L2 LIM - - 1 - --- 2023-08-08 Shengyu Qu Andes Superseded
[v3,2/3] riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation arch: riscv: jh7110: Correctly zero L2 LIM - - - - --- 2023-08-08 Shengyu Qu Andes Superseded
[v3,1/3] riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE arch: riscv: jh7110: Correctly zero L2 LIM - - 1 - --- 2023-08-08 Shengyu Qu Andes Superseded
[v2,3/3] riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE arch: riscv: jh7110: Correctly zero L2 LIM - - - - --- 2023-08-07 Shengyu Qu Andes Superseded
[v2,2/3] riscv: Add ZERO_MEM_BEFORE_USE implementation arch: riscv: jh7110: Correctly zero L2 LIM - - - - --- 2023-08-07 Shengyu Qu Andes Superseded
[v2,1/3] riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE arch: riscv: jh7110: Correctly zero L2 LIM - - - - --- 2023-08-07 Shengyu Qu Andes Superseded
[RESEND,v1,4/4] configs: riscv: starfive: Add VF2 PCIe USB3 XHCI support Add StarFive VF2 USB host support. - - 1 - --- 2023-08-07 Minda Chen Andes Accepted
[RESEND,v1,3/4] riscv: starfive: Add SYS_CACHE_SHIFT_6 to enable SYS_CACHELINE_SIZE Add StarFive VF2 USB host support. - - 2 - --- 2023-08-07 Minda Chen Andes Accepted
[RESEND,v1,2/4] riscv: dts: starfive: Enable pcie0 dts node Add StarFive VF2 USB host support. - - 1 - --- 2023-08-07 Minda Chen Andes Accepted
[RESEND,v1,1/4] pci: plda: Get correct ECAM offset in multiple PCIe RC case Add StarFive VF2 USB host support. - - 1 - --- 2023-08-07 Minda Chen Andes Accepted
[v1,4/4] configs: riscv: starfive: Add VF2 PCIe XHCI config support Add VF2 USB host support. - - - - --- 2023-08-03 Minda Chen Andes Superseded
[v1,2/4] riscv: dts: starfive: Enable pcie0 dts node Add VF2 USB host support. - - - - --- 2023-08-03 Minda Chen Andes Superseded
[v1,1/4] pci: plda: Get correct ECAM offset in multiple PCIe RC case Add VF2 USB host support. - - - - --- 2023-08-03 Minda Chen Andes Superseded
[1/1] cmd/sbi: display new extensions [1/1] cmd/sbi: display new extensions - - 1 - --- 2023-08-02 Heinrich Schuchardt Andes Accepted
[1/1] riscv: qemu: imply CONFIG_DM_RNG [1/1] riscv: qemu: imply CONFIG_DM_RNG - - 1 - --- 2023-07-28 Heinrich Schuchardt Andes Accepted
Remove unused parameters Remove unused parameters - - - - --- 2023-07-28 Shenlin Liang Andes Changes Requested
[v2,1/1] acpi: Add missing RISC-V acpi_table header [v2,1/1] acpi: Add missing RISC-V acpi_table header - - 1 - --- 2023-07-26 Heinrich Schuchardt Andes Accepted
[1/1] riscv: sifive: initialize PCI on Unmatched [1/1] riscv: sifive: initialize PCI on Unmatched - - 1 - --- 2023-07-25 Heinrich Schuchardt Andes Accepted
[v8,4/4] riscv: dts: starfive: Enable PCIe host controller Add StarFive JH7110 PCIe drvier support - - 1 - --- 2023-07-25 Minda Chen Andes Accepted
[v8,3/4] configs: starfive-jh7110: Add support for PCIe host driver Add StarFive JH7110 PCIe drvier support - - 1 - --- 2023-07-25 Minda Chen Andes Accepted
[v8,2/4] starfive: pci: Add StarFive JH7110 pcie driver Add StarFive JH7110 PCIe drvier support 1 - 1 - --- 2023-07-25 Minda Chen Andes Accepted
[v8,1/4] i2c: designware: Add Kconfig for designware_i2c_pci.c Add StarFive JH7110 PCIe drvier support - - 2 - --- 2023-07-25 Minda Chen Andes Accepted
[1/1] acpi: Add missing RISC-V acpi_table header [1/1] acpi: Add missing RISC-V acpi_table header - - - - --- 2023-07-25 Heinrich Schuchardt Andes Superseded
[18/18] riscv: qemu: Enable usb keyboard as an input device video: bochs: Remove the x86 limitation - - 2 - --- 2023-07-23 Bin Meng Andes Accepted
[17/18] riscv: qemu: Remove out-of-date "riscv, kernel-start" handling video: bochs: Remove the x86 limitation - - 2 - --- 2023-07-23 Bin Meng Andes Accepted
[16/18] riscv: define a cache line size for the generic CPU video: bochs: Remove the x86 limitation - - 1 - --- 2023-07-23 Bin Meng Andes Accepted
[15/18] riscv: qemu: Enable PRE_CONSOLE_BUFFER video: bochs: Remove the x86 limitation - - 2 - --- 2023-07-23 Bin Meng Andes Accepted
[14/18] console: Print out complete stdio device list video: bochs: Remove the x86 limitation - - 2 - --- 2023-07-23 Bin Meng Andes Accepted
[13/18] console: Refactor stdio_print_current_devices() a little bit video: bochs: Remove the x86 limitation - - - - --- 2023-07-23 Bin Meng Andes Accepted
[12/18] console: Make stdio_print_current_devices() static video: bochs: Remove the x86 limitation - - 1 1 --- 2023-07-23 Bin Meng Andes Accepted
[11/18] console: kconfig: Drop the redundant VIDEO dependency video: bochs: Remove the x86 limitation - - 2 - --- 2023-07-23 Bin Meng Andes Accepted
[10/18] riscv: qemu: Enable Bochs video support video: bochs: Remove the x86 limitation - - 1 - --- 2023-07-23 Bin Meng Andes Accepted
[1/1] riscv: qemu: provide more SPL boot methods [1/1] riscv: qemu: provide more SPL boot methods - - - - --- 2023-07-22 Heinrich Schuchardt Andes New
[v2,1/1] riscv: define a cache line size for the generic CPU [v2,1/1] riscv: define a cache line size for the generic CPU - - 1 - --- 2023-07-21 Heinrich Schuchardt Andes Accepted
[v2,4/4] configs: starfive-jh7110: Add CONFIG_RTL8169 Fix rtl8169 compile warning and add a new device ID - - 1 - --- 2023-07-20 Minda Chen Andes Accepted
[v7,4/4] riscv: dts: starfive: Enable PCIe host controller Add StarFive JH7110 PCIe drvier support - - 1 - --- 2023-07-20 Minda Chen Andes Superseded
[v7,3/4] configs: starfive-jh7110: Add support for PCIe host driver Add StarFive JH7110 PCIe drvier support - - 1 - --- 2023-07-20 Minda Chen Andes Superseded
[v7,2/4] starfive: pci: Add StarFive JH7110 pcie driver Add StarFive JH7110 PCIe drvier support 1 - 1 - --- 2023-07-20 Minda Chen Andes Superseded
[v7,1/4] i2c: designware: Add CONFIG_ACPIGEN limitation to designware_i2c_pci.c Add StarFive JH7110 PCIe drvier support - - - - --- 2023-07-20 Minda Chen Andes Superseded
[2/2] doc: visionfive2: apply a trailing space to the prompt add a trailing space to prompt for visionfive2 board - - 1 - --- 2023-07-14 Chanho Park Andes Accepted
[1/2] configs: visionfive2: add a trailing space to prompt add a trailing space to prompt for visionfive2 board - - 1 - --- 2023-07-14 Chanho Park Andes Accepted
[v2,4/4] doc: t-head: lpi4a: document Lichee PI 4A board riscv: Initial support for Lichee PI 4A board - - 1 - --- 2023-07-08 Yixun Lan Andes Accepted
[v2,3/4] configs: th1520_lpi4a_defconfig: Add initial config riscv: Initial support for Lichee PI 4A board - - 1 - --- 2023-07-08 Yixun Lan Andes Accepted
[v2,2/4] riscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A board riscv: Initial support for Lichee PI 4A board - - 1 - --- 2023-07-08 Yixun Lan Andes Accepted
[v2,1/4] riscv: t-head: licheepi4a: initial support added riscv: Initial support for Lichee PI 4A board - - 1 - --- 2023-07-08 Yixun Lan Andes Accepted
[RFC] riscv: (visionfive2:) device tree binding for riscv_timer [RFC] riscv: (visionfive2:) device tree binding for riscv_timer - - - - --- 2023-07-07 Torsten Duwe Andes RFC
[v1,5/5] clk: starfive: jh7110: Add of_xlate ops and macros for clock id conversion Make the clock dt-bindings and DT nodes consistent with Linux - - 1 - --- 2023-07-07 Hal Feng Andes Accepted
[v1,4/5] dt-bindings: clock: jh7110: Modify clock id to be same with Linux Make the clock dt-bindings and DT nodes consistent with Linux - - 1 - --- 2023-07-07 Hal Feng Andes Accepted
[v1,3/5] riscv: dts: jh7110: Add clock source from PLL Make the clock dt-bindings and DT nodes consistent with Linux - - 1 - --- 2023-07-07 Hal Feng Andes Accepted
[v1,2/5] riscv: dts: jh7110: Add PLL clock controller node Make the clock dt-bindings and DT nodes consistent with Linux - - 1 - --- 2023-07-07 Hal Feng Andes Accepted
[v1,1/5] clk: starfive: jh7110: Separate the PLL driver Make the clock dt-bindings and DT nodes consistent with Linux - - 1 - --- 2023-07-07 Hal Feng Andes Accepted
[2/2] board: ae350: Add missing env variables for booti [1/2] riscv: andes_plicsw: Fix IPI during OpenSBI invocation - - 1 - --- 2023-07-04 Yu Chien Peter Lin Andes Accepted
[1/2] riscv: andes_plicsw: Fix IPI during OpenSBI invocation [1/2] riscv: andes_plicsw: Fix IPI during OpenSBI invocation - - 1 - --- 2023-07-04 Yu Chien Peter Lin Andes Accepted
[1/1] RISC-V: CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS description [1/1] RISC-V: CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS description - - 2 - --- 2023-07-04 Heinrich Schuchardt Andes Accepted
[v5] dt-bindings: riscv: deprecate riscv,isa [v5] dt-bindings: riscv: deprecate riscv,isa 1 - 2 - --- 2023-07-01 Conor Dooley Andes Handled Elsewhere
[v4] dt-bindings: riscv: deprecate riscv,isa [v4] dt-bindings: riscv: deprecate riscv,isa 1 - 2 - --- 2023-06-30 Conor Dooley Andes Handled Elsewhere
clk: starfive: pll: Fix to use postdiv1_mask clk: starfive: pll: Fix to use postdiv1_mask - - 1 - --- 2023-06-28 Hoegeun Kwon Andes Accepted
[RFC] riscv: sifive: fu70: downclock CPU clock for stability [RFC] riscv: sifive: fu70: downclock CPU clock for stability - - - - --- 2023-06-28 Icenowy Zheng Andes RFC
[v2] riscv: Fix alignment of RELA sections in the linker scripts [v2] riscv: Fix alignment of RELA sections in the linker scripts - 1 1 - --- 2023-06-27 Bin Meng Andes Accepted
[v3] dt-bindings: riscv: deprecate riscv,isa [v3] dt-bindings: riscv: deprecate riscv,isa 1 - 2 - --- 2023-06-26 Conor Dooley Andes Handled Elsewhere
[v2,3/3] riscv: Rename SiFive CLINT to RISC-V ALINT riscv: Add ACLINT mtimer and mswi devices support - - 1 - --- 2023-06-21 Bin Meng Andes Accepted
[v2,2/3] riscv: clint: Update the sifive clint ipi driver to support aclint riscv: Add ACLINT mtimer and mswi devices support - - 1 - --- 2023-06-21 Bin Meng Andes Accepted
[v2,1/3] riscv: timer: Update the sifive clint timer driver to support aclint riscv: Add ACLINT mtimer and mswi devices support - - 1 - --- 2023-06-21 Bin Meng Andes Accepted
riscv: Fix alignment of RELA sections in the linker scripts riscv: Fix alignment of RELA sections in the linker scripts - 1 1 - --- 2023-06-21 Bin Meng Andes Superseded
[v1,4/4] configs: starfive-jh7110: Add CONFIG_RTL8169 Fix rtl8169 compile warning and add a new device ID - - - - --- 2023-06-21 Minda Chen Andes Superseded
ci: riscv: Update OpenSBI to v1.2 ci: riscv: Update OpenSBI to v1.2 - - 1 - --- 2023-06-20 Bin Meng Andes Accepted
[v2,3/3] board: microchip: set mac address for ethernet1 on icicle Sync PolarFire SoC dts with Linux - - 1 1 --- 2023-06-15 Conor Dooley Andes Accepted
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