Show patches with: Archived = No       |   167398 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v2,2/6] andes: ae350: Implement cache switch via Kconfig [v2,1/6] andes: csr.h: Clean up CSR definition - - 1 - --- 2023-12-26 Leo Liang Andes Accepted
[v2,1/6] andes: csr.h: Clean up CSR definition [v2,1/6] andes: csr.h: Clean up CSR definition - - 1 - --- 2023-12-26 Leo Liang Andes Accepted
riscv: Extend board compatible string with "qemu,mbv" riscv: Extend board compatible string with "qemu,mbv" - 1 1 - --- 2023-12-20 Michal Simek Andes Accepted
[2/2] riscv: cache: support cache enable in SPL stage Add SiFive private L2 cache driver - - 1 - --- 2023-12-14 Zong Li Andes Accepted
[1/2] cache: add sifive private L2 cache driver Add SiFive private L2 cache driver - - 1 - --- 2023-12-14 Zong Li Andes Accepted
[v2] timer: starfive: Add Starfive timer support [v2] timer: starfive: Add Starfive timer support - - 1 - --- 2023-12-11 Jun Liang Tan Andes Accepted
riscv: sifive: unmatched: migrate to text environment riscv: sifive: unmatched: migrate to text environment - - 1 - --- 2023-12-05 Yong-Xuan Wang Andes Accepted
[v2] timer: starfive: Add Starfive timer support [v2] timer: starfive: Add Starfive timer support - - - - --- 2023-11-28 Kuan Lim Lee Andes Superseded
starfive: visionfive2: add device tree overlay support starfive: visionfive2: add device tree overlay support - - 1 - --- 2023-11-20 John Clark Andes Accepted
[V3] riscv: binman: fix the load field format [V3] riscv: binman: fix the load field format - - 1 - --- 2023-11-17 Randolph Andes Accepted
[V3,3/3] configs: andes: add the fdt blob address for SPL copy to doc: falcon: riscv: Falcon Mode boot on RISC-V - - 1 - --- 2023-11-16 Randolph Andes Changes Requested
[V3,2/3] spl: riscv: falcon: move fdt blob to specified address doc: falcon: riscv: Falcon Mode boot on RISC-V - - 1 - --- 2023-11-16 Randolph Andes Changes Requested
[V3,1/3] doc: falcon: riscv: Falcon Mode boot on RISC-V doc: falcon: riscv: Falcon Mode boot on RISC-V - - 1 - --- 2023-11-16 Randolph Andes Changes Requested
riscv: andes: Fix enable register settings of PLICSW riscv: andes: Fix enable register settings of PLICSW - 1 1 - --- 2023-11-16 Yu Chien Peter Lin Andes Accepted
[1/1] risc-v: qemu: imply NVME_PCI [1/1] risc-v: qemu: imply NVME_PCI - 1 - - --- 2023-11-16 Heinrich Schuchardt Andes Accepted
[V2] riscv: binman: fix the load field format [V2] riscv: binman: fix the load field format - - 1 - --- 2023-11-16 Randolph Andes Superseded
[v2] riscv: Add support for AMD/Xilinx MicroBlaze V [v2] riscv: Add support for AMD/Xilinx MicroBlaze V - - 2 - --- 2023-11-06 Michal Simek Andes Accepted
[v2] timer: starfive: Add Starfive timer support [v2] timer: starfive: Add Starfive timer support - - 1 - --- 2023-11-06 Kuan Lim Lee Andes Superseded
[4/4] configs: visionfive2: Enable watchdog driver Support StarFive Watchdog driver - - 1 - --- 2023-11-05 Chanho Park Andes Accepted
[3/4] riscv: dts: jh7110: Add watchdog device tree node Support StarFive Watchdog driver - - 1 - --- 2023-11-05 Chanho Park Andes Accepted
[2/4] watchdog: Add StarFive Watchdog driver Support StarFive Watchdog driver - - 2 - --- 2023-11-05 Chanho Park Andes Accepted
[1/4] clk: starfive: jh7110: Add watchdog clocks Support StarFive Watchdog driver - - 1 - --- 2023-11-05 Chanho Park Andes Accepted
riscv: Add support for AMD/Xilinx MicroBlaze V riscv: Add support for AMD/Xilinx MicroBlaze V - - - - --- 2023-11-03 Michal Simek Andes Changes Requested
[v4,5/5] configs: visionfive2: Enable JH7110 RNG driver Add support for StarFive JH7110 TRNG driver - - 1 - --- 2023-11-01 Chanho Park Andes Accepted
[v4,4/5] riscv: dts: jh7110: Add rng device tree node Add support for StarFive JH7110 TRNG driver - - 1 - --- 2023-11-01 Chanho Park Andes Accepted
[v4,3/5] rng: Add StarFive JH7110 RNG driver Add support for StarFive JH7110 TRNG driver - - 1 - --- 2023-11-01 Chanho Park Andes Accepted
[v4,2/5] clk: starfive: jh7110: Add security clocks Add support for StarFive JH7110 TRNG driver - - 1 - --- 2023-11-01 Chanho Park Andes Accepted
[v4,1/5] riscv: import read/write_relaxed functions Add support for StarFive JH7110 TRNG driver - - 1 - --- 2023-11-01 Chanho Park Andes Accepted
[v3,5/5] configs: visionfive2: Enable JH7110 RNG driver Add support for StarFive JH7110 TRNG driver - - 1 - --- 2023-11-01 Chanho Park Andes Superseded
[v3,4/5] riscv: dts: jh7110: Add rng device tree node Add support for StarFive JH7110 TRNG driver - - - - --- 2023-11-01 Chanho Park Andes Superseded
[v3,3/5] rng: Add StarFive JH7110 RNG driver Add support for StarFive JH7110 TRNG driver - - - - --- 2023-11-01 Chanho Park Andes Superseded
[v3,2/5] clk: starfive: jh7110: Add security clocks Add support for StarFive JH7110 TRNG driver - - - - --- 2023-11-01 Chanho Park Andes Superseded
[v3,1/5] riscv: import read/write_relaxed functions Add support for StarFive JH7110 TRNG driver - - - - --- 2023-11-01 Chanho Park Andes Superseded
[v2,5/5] configs: visionfive2: Enable JH7110 RNG driver Add support for StarFive JH7110 TRNG driver - - 1 - --- 2023-10-31 Chanho Park Andes Superseded
[v2,4/5] riscv: dts: jh7110: Add rng device tree node Add support for StarFive JH7110 TRNG driver - - - - --- 2023-10-31 Chanho Park Andes Superseded
[v2,3/5] rng: Add StarFive JH7110 RNG driver Add support for StarFive JH7110 TRNG driver - - - - --- 2023-10-31 Chanho Park Andes Superseded
[v2,2/5] clk: starfive: jh7110: Add security clocks Add support for StarFive JH7110 TRNG driver - - - - --- 2023-10-31 Chanho Park Andes Superseded
[v2,1/5] riscv: import read/write_relaxed functions Add support for StarFive JH7110 TRNG driver - - - - --- 2023-10-31 Chanho Park Andes Superseded
[v3,2/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension rng: Provide a RNG based on the RISC-V Zkr ISA extension - - 1 - --- 2023-10-31 Heinrich Schuchardt Andes Accepted
[v3,1/2] riscv: allow resume after exception rng: Provide a RNG based on the RISC-V Zkr ISA extension - - 1 - --- 2023-10-31 Heinrich Schuchardt Andes Accepted
[2/2] board: starfive: spl: Support jtag for VisionFive2 board Support JTAG for VisionFive2 board - - 1 - --- 2023-10-31 Chanho Park Andes Accepted
[1/2] riscv: cpu: jh7110: Add gpio helper macros Support JTAG for VisionFive2 board - - 1 - --- 2023-10-31 Chanho Park Andes Accepted
[2/2] configs: starfive2: Enable CONFIG_SYSRET config [1/2] riscv: dts: jh7110: Add a gpio-restart node - - 1 - --- 2023-10-31 Jaehoon Chung Andes Accepted
[1/2] riscv: dts: jh7110: Add a gpio-restart node [1/2] riscv: dts: jh7110: Add a gpio-restart node - - 1 - --- 2023-10-31 Jaehoon Chung Andes Accepted
riscv: Weakly define invalidate_icache_range() riscv: Weakly define invalidate_icache_range() - - 1 - --- 2023-10-31 Samuel Holland Andes Accepted
riscv: Align the trap handler to 64 bytes riscv: Align the trap handler to 64 bytes - - 1 - --- 2023-10-31 Samuel Holland Andes Accepted
riscv: Sort target configs alphabetically riscv: Sort target configs alphabetically - - 1 - --- 2023-10-31 Samuel Holland Andes Accepted
[5/5] configs: visionfive2: Enable JH7110 RNG driver Add support for StarFive JH7110 TRNG driver - - 1 - --- 2023-10-30 Chanho Park Andes Superseded
[4/5] riscv: dts: jh7110: Add rng device tree node Add support for StarFive JH7110 TRNG driver - - - - --- 2023-10-30 Chanho Park Andes Superseded
[3/5] rng: Add StarFive JH7110 RNG driver Add support for StarFive JH7110 TRNG driver - - - - --- 2023-10-30 Chanho Park Andes Superseded
[2/5] clk: starfive: jh7110: Add security clocks Add support for StarFive JH7110 TRNG driver - - - - --- 2023-10-30 Chanho Park Andes Superseded
[1/5] riscv: import read/write_relaxed functions Add support for StarFive JH7110 TRNG driver - - - - --- 2023-10-30 Chanho Park Andes Superseded
[RFC,v2,2/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension rng: Provide a RNG based on the RISC-V Zkr ISA extension - - 1 - --- 2023-10-29 Heinrich Schuchardt Andes RFC
[RFC,v2,1/2] riscv: allow resume after exception rng: Provide a RNG based on the RISC-V Zkr ISA extension - - 1 - --- 2023-10-29 Heinrich Schuchardt Andes RFC
[RFC,1/1] rng: Provide a RNG based on the RISC-V Zkr ISA extension [RFC,1/1] rng: Provide a RNG based on the RISC-V Zkr ISA extension - - 1 1 --- 2023-10-28 Heinrich Schuchardt Andes Superseded
[1/1] board: sifive: unmatched: move kernel load address to 0x80200000 [1/1] board: sifive: unmatched: move kernel load address to 0x80200000 - - 1 - --- 2023-10-26 Yong-Xuan Wang Andes Accepted
[1/1] CI: use OpenSBI 1.3.1 for testing [1/1] CI: use OpenSBI 1.3.1 for testing - - 1 - --- 2023-10-24 Heinrich Schuchardt Andes Accepted
[V2,7/7] riscv: spl: andes: Move the DTB in front of kernel riscv: spl: OpenSBI OS boot mode - - 1 - --- 2023-10-12 Randolph Andes Accepted
[V2,6/7] andes: config: add riscv falcon mode for ae350 platform riscv: spl: OpenSBI OS boot mode - - 1 - --- 2023-10-12 Randolph Andes Accepted
[V2,5/7] spl: riscv: add os type for next booting stage riscv: spl: OpenSBI OS boot mode - - 1 - --- 2023-10-12 Randolph Andes Accepted
[V2,4/7] Makefile: delete file *.itb when make clean riscv: spl: OpenSBI OS boot mode - - 1 - --- 2023-10-12 Randolph Andes Accepted
[V2,3/7] riscv: dts: binman: add condition for opensbi os boot riscv: spl: OpenSBI OS boot mode - - 1 - --- 2023-10-12 Randolph Andes Accepted
[V2,2/7] riscv: kconfig: introduce SPL_LOAD_FIT_OPENSBI_OS_BOOT symbol riscv: spl: OpenSBI OS boot mode - - 1 - --- 2023-10-12 Randolph Andes Accepted
[V2,1/7] spl: riscv: opensbi: change the default os_type as varible riscv: spl: OpenSBI OS boot mode - - 1 - --- 2023-10-12 Randolph Andes Accepted
riscv: andes: Rearrange Andes PLICSW to single-bit-per-hart strategy riscv: andes: Rearrange Andes PLICSW to single-bit-per-hart strategy - - 1 - --- 2023-10-12 Randolph Andes Accepted
riscv: binman: Fix compilation error riscv: binman: Fix compilation error - - 1 - --- 2023-10-11 Mayuresh Chitale Andes Accepted
configs: visionfive2: enable bootstage configs configs: visionfive2: enable bootstage configs - - 1 - --- 2023-10-10 Chanho Park Andes Accepted
[RESEND,7/7] riscv: spl: andes: Move the DTB in front of kernel riscv: spl: OpenSBI OS boot mode - - - - --- 2023-10-06 Randolph Andes Superseded
[RESEND,6/7] andes: config: add riscv falcon mode for ae350 platform riscv: spl: OpenSBI OS boot mode - - - - --- 2023-10-06 Randolph Andes Superseded
[RESEND,5/7] spl: riscv: add os type for next booting stage riscv: spl: OpenSBI OS boot mode - - - - --- 2023-10-06 Randolph Andes Superseded
[RESEND,4/7] riscv: dts: introduce SPL_LOAD_FIT_OPENSBI_OS_BOOT symbol riscv: spl: OpenSBI OS boot mode - - - - --- 2023-10-06 Randolph Andes Superseded
[RESEND,3/7] spl: riscv: opensbi: change the default os_type as varible riscv: spl: OpenSBI OS boot mode - - 1 - --- 2023-10-06 Randolph Andes Superseded
[RESEND,2/7] riscv: dts: add binman_linux.dtsi for opensbi os boot mode riscv: spl: OpenSBI OS boot mode - - - - --- 2023-10-06 Randolph Andes Superseded
[RESEND,1/7] riscv: dts: Introduce SPL_LOAD_FIT_CONFIG symbol riscv: spl: OpenSBI OS boot mode - - - - --- 2023-10-06 Randolph Andes Superseded
[v2] riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode [v2] riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode - - 1 - --- 2023-09-29 Yu Chien Peter Lin Andes Accepted
riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode - - 1 - --- 2023-09-27 Yu Chien Peter Lin Andes Superseded
[1/1] riscv: remove dram_init_banksize() [1/1] riscv: remove dram_init_banksize() - - 1 - --- 2023-09-26 Heinrich Schuchardt Andes Accepted
[7/7] riscv: spl: andes: Move the DTB in front of kernel riscv: spl: OpenSBI OS boot mode - - - - --- 2023-09-25 Randolph Andes Superseded
[6/7] andes: config: add riscv falcon mode for ae350 platform riscv: spl: OpenSBI OS boot mode - - - - --- 2023-09-25 Randolph Andes Superseded
[5/7] spl: riscv: add os type for next booting stage riscv: spl: OpenSBI OS boot mode - - - - --- 2023-09-25 Randolph Andes Superseded
[4/7] riscv: dts: introduce SPL_LOAD_FIT_OPENSBI_OS_BOOT symbol riscv: spl: OpenSBI OS boot mode - - - - --- 2023-09-25 Randolph Andes Superseded
[3/7] spl: riscv: opensbi: change the default os_type as varible riscv: spl: OpenSBI OS boot mode - - - - --- 2023-09-25 Randolph Andes Superseded
[2/7] riscv: dts: add binman_linux.dtsi for opensbi os boot mode riscv: spl: OpenSBI OS boot mode - - - - --- 2023-09-25 Randolph Andes Superseded
[1/7] riscv: dts: Introduce SPL_LOAD_FIT_CONFIG symbol riscv: spl: OpenSBI OS boot mode - - - - --- 2023-09-25 Randolph Andes Superseded
[V3,2/2] configs: andes: rearrange SPL mode memory layout andes: rearrange defconfig and dts - - 1 - --- 2023-09-25 Randolph Andes Accepted
[V3,1/2] configs: andes: add vender prefix for target name andes: rearrange defconfig and dts - - 1 - --- 2023-09-25 Randolph Andes Accepted
timer: starfive: Add Starfive timer support timer: starfive: Add Starfive timer support - - 2 - --- 2023-09-19 Kuan Lim Lee Andes Accepted
[1/1] starfive: visionfive2: add mmc0 and nvme boot targets [1/1] starfive: visionfive2: add mmc0 and nvme boot targets - - 1 - --- 2023-09-18 Milan P. Stanić Andes Accepted
[v3,2/2] riscv: dts: starfive: generate u-boot-spl.bin.normal.out riscv: starfive: generate u-boot-spl.bin.normal.out - - - 1 --- 2023-09-17 Heinrich Schuchardt Andes Accepted
[v3,1/2] tools: mkimage: Add StarFive SPL image support riscv: starfive: generate u-boot-spl.bin.normal.out - - - 2 --- 2023-09-17 Heinrich Schuchardt Andes Accepted
[v1,2/2] board: visionfive2: Fixup memory size passed to kernel Fix memory size problem on Visionfive 2 - - - 1 --- 2023-09-16 Shengyu Qu Andes Accepted
[v1,1/2] configs: visionfive2: Enable CONFIG_OF_BOARD_SETUP Fix memory size problem on Visionfive 2 - - - 1 --- 2023-09-16 Shengyu Qu Andes Accepted
[v2] riscv: enable multi-range memory layout [v2] riscv: enable multi-range memory layout - - - - --- 2023-09-14 Wu, Fei Andes New
[RFC,2/2] configs: visionfive2: Enable MISC_INIT_R board: visionfive2: Select fdtfile based on revision - - - 1 --- 2023-09-11 Jami Kettunen Andes RFC
[RFC,1/2] board: visionfive2: Select fdtfile based on revision board: visionfive2: Select fdtfile based on revision - - - 1 --- 2023-09-11 Jami Kettunen Andes RFC
[2/2] sifive: ccache: add clear LIM area [1/2] cache: sifive: clear out the error irqs on init - - - - --- 2023-09-08 Ben Dooks Andes Rejected
[1/2] cache: sifive: clear out the error irqs on init [1/2] cache: sifive: clear out the error irqs on init - - - - --- 2023-09-08 Ben Dooks Andes Rejected
[1/1] configs: NVMe/USB target boot devices on VisionFive 2 [1/1] configs: NVMe/USB target boot devices on VisionFive 2 - - 1 - --- 2023-09-07 Heinrich Schuchardt Andes Accepted
[1/1] riscv: set fdtfile on VisionFive 2 [1/1] riscv: set fdtfile on VisionFive 2 - - 1 1 --- 2023-09-07 Heinrich Schuchardt Andes Accepted
[v3,3/3] timer: riscv_aclint_timer: add timer_get_boot_us for BOOTSTAGE bootstage support for risc-v - - 1 - --- 2023-09-06 Chanho Park Andes Accepted
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