Message ID | cover.1602078045.git.michal.simek@xilinx.com |
---|---|
Headers | show |
Series | arm64: zynqmp: Enable loading FPGA by SPL | expand |
st 7. 10. 2020 v 15:40 odesÃlatel Michal Simek <michal.simek@xilinx.com> napsal: > > Hi, > > this series enables loading fpga bitstream from FIT image by SPL. > > Thanks, > Michal > > > Michal Simek (4): > firmware: zynqmp: Swap addr_hi/low when PM_FPGA_LOAD is called > mailbox: zynqmp: Extend timeout for getting observation bit > arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf > arm64: zynqmp: Enable FPGA loading from SPL > > board/xilinx/zynqmp/zynqmp.c | 7 +++++-- > configs/xilinx_zynqmp_virt_defconfig | 1 + > drivers/firmware/firmware-zynqmp.c | 8 ++++++++ > drivers/mailbox/zynqmp-ipi.c | 2 +- > 4 files changed, 15 insertions(+), 3 deletions(-) > > -- > 2.28.0 > Applied all. M