From patchwork Mon Nov 6 12:12:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 834670 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="XM/4Asyc"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yVs0P39Grz9s7M for ; Mon, 6 Nov 2017 23:13:25 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 2DBAAC21DBA; Mon, 6 Nov 2017 12:13:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 627B8C21DBA; Mon, 6 Nov 2017 12:13:15 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id DBC17C21DBA; Mon, 6 Nov 2017 12:13:14 +0000 (UTC) Received: from mail-wr0-f172.google.com (mail-wr0-f172.google.com [209.85.128.172]) by lists.denx.de (Postfix) with ESMTPS id 8DB6EC21DA1 for ; Mon, 6 Nov 2017 12:13:14 +0000 (UTC) Received: by mail-wr0-f172.google.com with SMTP id u97so893769wrc.1 for ; Mon, 06 Nov 2017 04:13:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=oH+nMBXLCMIzTExpktT1FzuZu5OaZM2mpOaEABVQDmw=; b=XM/4AsycvE+95DHMEyf9qwUcCYVFoelSAg/qJ4MVxHfFRepc6BgLVvPVNIThwnaS+7 hk/sm8FAi+CL2YEId8u1dVnLsIQvWWr6lrr3Q09YlOf11Fvd7KBCoo+hwnnrrfmF9tED A1Rr+URb7J84tYYdq+stf3XOZLYt8HuNy96hxBNAYNkhtAO+SHphy+H4NJHJOPO8R87y g3VVtjReoHUWgl9hTgo8CXDiDZqh9310A2Pzh58lvEC1fwvJC0mFAh/ZcLGQGU+9BQru ezsU9MJTfJF0y0SW4ZRjWntZPWc+duMWotdExIw5XJotb7Zab83rOdA3XrwaZ8memZbh QaAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=oH+nMBXLCMIzTExpktT1FzuZu5OaZM2mpOaEABVQDmw=; b=S7nqfj+Ate+WtGx88rgA6urup5oknF7G9CORCRY5wDzZNQLzj0AXYZOYJPtBsK89tA UwcbaOV1UmXeHOSVrhQZKbpCZ3JSj3WLiH6AfFbLZQG+yWyms0ooxEbA9xmRBTq+Fu0R SHH8aPb2DDate8ZdYRqc3+Ofk71l5rDGmmxchP1D6Ih6pQmyb+drxfXZzWTAu6CP6K1Y E14mBvHjNO0z+BvxF3SSuvX8rTWvn9tcptgjsdTBzd3Ckndzt1iLRLQyXdl9I6cm+gN1 ygd2nCiJWlYZlsejIZh5xVzSRoaXVRQmH4mMHRIl5JO8h05dnPSloLL3GpcDi7xk3ED0 1Gjw== X-Gm-Message-State: AMCzsaXiHUIhIn6cOL069tAam3hs7WJkHQAB3UUuGdI1CgCtxFUvsxEG 3ULHz2WPzdm1WX1WmSaLy+g0q5pg X-Google-Smtp-Source: ABhQp+Suqf020BbeciMv3wrBVxtbDQdIHzEW6Nm+FOHv2/0RGvCMw0OUQgTjgi5lTvzU+UGhAvfVRQ== X-Received: by 10.223.132.6 with SMTP id 6mr12258590wrf.93.1509970394013; Mon, 06 Nov 2017 04:13:14 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id 74sm12240779wmf.4.2017.11.06.04.13.13 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Mon, 06 Nov 2017 04:13:13 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Date: Mon, 6 Nov 2017 13:12:32 +0100 Message-Id: X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Cc: Shubhrajyoti Datta , Filip Drazic , Anurag Kumar Vulisha , Sai Krishna Potthuri , Kedareswara rao Appana , Naga Sureshkumar Relli , Chirag Parekh , Bharat Kumar Gogada , Nava kishore Manne , Kedareswara rao Appana , Rajnikant Bhojani , Soren Brinkmann , Jernej Skrabec , VNSL Durga , Manish Narani , Maxime Ripard Subject: [U-Boot] [PATCH 00/40] zynqmp: arm64: DT changes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patchset is updating zynqmp DT binding. Thanks, Michal Anurag Kumar Vulisha (6): arm64: zynqmp: Add SMMU support for SATA IP arm64: zynqmp: Add reset-controller support in serdes driver arm64: zynqmp: Use reset controller framework for asserting/de-asserting reset arm64: zynqmp: Add support reading SoC revision using nvmem driver in dwc3 arm64: zynqmp: Uncomment snps,quirk-frame-length-adjustment flag in dwc3 arm64: zynqmp: usb: Correct IOMMU node for making SMMU work with USB Bharat Kumar Gogada (1): arm64: zynqmp: zcu102: Modifying GTR lane-0 to PCIe Chirag Parekh (1): arm64: zynqmp: Update device tree for gpio Hyun Kwon (1): arm64: zynqmp: Update the GPU address size Jolly Shah (1): arm64: zynqmp: Reduced min-residency time for idle state node Jyotheeswar Reddy (1): arm64: zynqmp: DT: Fix typo in idle-states node definition Jyotheeswar Reddy Mutthareddyvari (1): arm64: zynqmp: PM: Specify power domains for DP related nodes Madhurkiran Harikrishnan (1): arm64: zynqmp: Add clock name for GPU Manish Narani (3): arm64: zynqmp: sdhci: set host quirk2 for no 1.8V support for 1.0 silicon arm64: zynqmp: Enabled CCI support for USB arm64: zynqmmp: Add USB OTG interrupts support in dt Michal Simek (16): arm64: zynqmp: Add references to cpu nodes arm64: zynqmp: Fix broken architected timer interrupt trigger arm64: zynqmp: Add missing gpio property to dtsi arm64: zynqmp: Use revision in dts file description arm64: zynqmp: Add revB string to compatible string arm64: zynqmp: Add missing alias for gem0 for ep108 arm64: zynqmp: Remove leading 0s from mtd table for spi flashes arm64: zynqmp: Use SPDX license with dc4 arm64: zynqmp: Remove local-mac-address from dtsi file arm64: zynqmp: Update device tree for pinmux arm64: zynqmp: Add support for zcu102 1.0 rev arm64: zynqmp: Remove tx_termination_fix detection on silicon v1 arm64: zynqmp: dt: Add AMS node arm64: zynqmp: Move nodes which have no reg property out of bus arm64: zynqmp: Remove clock setting from dtsi arm64: zynqmp: Add note about si5328 interrupt Naga Sureshkumar Relli (1): arm64: zynqmp: disable smmu Nava kishore Manne (3): arm64: zynqmp: Label whole PL part as fpga_full region arm64: zynqmp: rtc: Add calibration arm64: zynqmp: Add support for zynqmp nvmem firmware driver Rob Herring (1): arm64: dts: xilinx: fix PCI bus dtc warnings Shubhrajyoti Datta (2): arm64: zynqmp: Update the OPPs for cpu freq arm64: zynqmp: Enable watchdog by default Soren Brinkmann (1): arm64: zynqmp: PM: Add IRQ arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-clk.dtsi | 2 +- arch/arm/dts/zynqmp-ep108-clk.dtsi | 2 +- arch/arm/dts/zynqmp-ep108.dts | 5 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 1 - arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 5 +- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 9 +- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 1 - arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 37 +++ arch/arm/dts/zynqmp-zcu102-revA.dts | 321 +++++++++++++++++++++++++- arch/arm/dts/zynqmp-zcu102-revB.dts | 1 + arch/arm/dts/zynqmp.dtsi | 284 +++++++++++++++-------- configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 75 ++++++ include/dt-bindings/pinctrl/pinctrl-zynqmp.h | 30 +++ 14 files changed, 653 insertions(+), 121 deletions(-) create mode 100644 arch/arm/dts/zynqmp-zcu102-rev1.0.dts create mode 100644 configs/xilinx_zynqmp_zcu102_rev1_0_defconfig create mode 100644 include/dt-bindings/pinctrl/pinctrl-zynqmp.h