| Message ID | 20201202203211.2843-1-padmarao.begari@microchip.com |
|---|---|
| Headers | show |
| Series | Microchip PolarFire SoC support | expand |
Hi Padmarao > From: Padmarao Begari [mailto:padmarao.begari@microchip.com] > Sent: Thursday, December 03, 2020 4:32 AM > To: u-boot@lists.denx.de; bmeng.cn@gmail.com; Rick Jian-Zhi Chen(陳建志); anup.patel@wdc.com; lukas.auer@aisec.fraunhofer.de; joe.hershberger@ni.com; lukma@denx.de; atish.patra@wdc.com > Cc: cyril.jean@microchip.com; lewis.hanly@microchip.com; ivan.griffin@emdalo.com; daire.mcnamara@emdalo.com; conor.dooley@microchip.com; Padmarao Begari > Subject: [PATCH v5 0/7] Microchip PolarFire SoC support > > This patch set adds Microchip PolarFire SoC Icicle Kit support > to RISC-V U-Boot. > > The patches are based upon latest U-Boot tree > (https://gitlab.denx.de/u-boot/u-boot.git) at commit id > 80cbd731df50b9ab646940ea862b70bcaff37225 > > All drivers namely: NS16550 Serial, Microchip clock, > Cadence eMMC and Cadence MACB Ethernet work fine on actual > Microchip PolarFire SoC Icicle Kit. > > Changes in v5: > - Replace compatible string "microchip,polarfire-soc" with > "microchip,mpfs-icicle-kit" in the device tree > - Use "mpfs" as identifier in place of "polarfire-soc", "pfsoc" > - Fix some typos in doc > - Rename the clock driver files clk_pfsoc_* to mpfs_clk_* > - Rename pfsoc-clock.h to mpfs-clock.h > > Changes in v4: > - Add dual-license GPL or MIT in the device tree > - Replace microsemi compatible strings with microchip > - Add MACB compatible string for Microchip PolarFire SoC ethernet > - Update MACB driver for 32-bit/64-bit DMA based on compatible string > > Changes in v3: > - Add 'default y if 64BIT' for config DMA_ADDR_T_64BIT > - Update MACB driver for 32-bit/64-bit DMA based on design config register > - Add phy-handle in MACB driver to read the phy address from device tree > - Fix checkpatch warnings in the clock driver > - Remove fu540 related compatible strings from soc device tree node > - Move refclk device tree node under /soc device tree node > - Use local-mac-address instead of mac-address in the device tree > - Rename device tree to microchip-mpfs-icicle-kit.dts > - Add U-Boot specific dts microchip-mpfs-icicle-kit-u-boot.dtsi file > - Drop the imply DMA_ADDR_T_64BIT from board config > - Fix some typos > - Update doc with Microchip and Custom boot-flow > > Changes in v2: > - Add clock frequency for the clint device tree node > - Move peripheral device tree nodes under /soc device tree node > - Device tree nodes are in order based on the address > - Enable UART0 for U-Boot logs > - Update doc for the U-Boot logs are on UART0 > - Move clock and reset index source into patch4 > - Remove "dma_addr_r" type in the macb driver > - Add lower_32_bits() for 32-bit address in the macb driver > - Add set_rate() returns the new clock rate in the clock driver > > Padmarao Begari (7): > riscv: Add DMA 64-bit address support > net: macb: Add DMA 64-bit address support for macb > net: macb: Add phy address to read it from device tree > clk: Add Microchip PolarFire SoC clock driver > riscv: dts: Add device tree for Microchip Icicle Kit > riscv: Add Microchip MPFS Icicle Kit support > doc: board: Add Microchip MPFS Icicle Kit doc > Please check about the CI failure item Job #95.59 https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/748298546 Thanks, Rick > arch/riscv/Kconfig | 4 + > arch/riscv/dts/Makefile | 1 + > .../dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 + > arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 421 +++++++++ > arch/riscv/include/asm/types.h | 4 + > board/microchip/mpfs_icicle/Kconfig | 24 + > board/microchip/mpfs_icicle/mpfs_icicle.c | 97 +- > configs/microchip_mpfs_icicle_defconfig | 9 +- > doc/board/index.rst | 1 + > doc/board/microchip/index.rst | 9 + > doc/board/microchip/mpfs_icicle.rst | 830 ++++++++++++++++++ > drivers/clk/Kconfig | 1 + > drivers/clk/Makefile | 1 + > drivers/clk/microchip/Kconfig | 5 + > drivers/clk/microchip/Makefile | 1 + > drivers/clk/microchip/mpfs_clk.c | 127 +++ > drivers/clk/microchip/mpfs_clk.h | 19 + > drivers/clk/microchip/mpfs_clk_cfg.c | 134 +++ > drivers/clk/microchip/mpfs_clk_periph.c | 173 ++++ > drivers/net/macb.c | 144 ++- > drivers/net/macb.h | 6 + > include/configs/microchip_mpfs_icicle.h | 60 +- > .../dt-bindings/clock/microchip,mpfs-clock.h | 45 + > 23 files changed, 2068 insertions(+), 62 deletions(-) > create mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit-u-boot.dtsi > create mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit.dts > create mode 100644 doc/board/microchip/index.rst > create mode 100644 doc/board/microchip/mpfs_icicle.rst > create mode 100644 drivers/clk/microchip/Kconfig > create mode 100644 drivers/clk/microchip/Makefile > create mode 100644 drivers/clk/microchip/mpfs_clk.c > create mode 100644 drivers/clk/microchip/mpfs_clk.h > create mode 100644 drivers/clk/microchip/mpfs_clk_cfg.c > create mode 100644 drivers/clk/microchip/mpfs_clk_periph.c > create mode 100644 include/dt-bindings/clock/microchip,mpfs-clock.h > > -- > 2.17.1 >
Hi Rick, On Thu, Dec 10, 2020 at 8:33 AM Rick Chen <rickchen36@gmail.com> wrote: > Hi Padmarao > > > From: Padmarao Begari [mailto:padmarao.begari@microchip.com] > > Sent: Thursday, December 03, 2020 4:32 AM > > To: u-boot@lists.denx.de; bmeng.cn@gmail.com; Rick Jian-Zhi Chen(陳建志); > anup.patel@wdc.com; lukas.auer@aisec.fraunhofer.de; joe.hershberger@ni.com; > lukma@denx.de; atish.patra@wdc.com > > Cc: cyril.jean@microchip.com; lewis.hanly@microchip.com; > ivan.griffin@emdalo.com; daire.mcnamara@emdalo.com; > conor.dooley@microchip.com; Padmarao Begari > > Subject: [PATCH v5 0/7] Microchip PolarFire SoC support > > > > This patch set adds Microchip PolarFire SoC Icicle Kit support > > to RISC-V U-Boot. > > > > The patches are based upon latest U-Boot tree > > (https://gitlab.denx.de/u-boot/u-boot.git) at commit id > > 80cbd731df50b9ab646940ea862b70bcaff37225 > > > > All drivers namely: NS16550 Serial, Microchip clock, > > Cadence eMMC and Cadence MACB Ethernet work fine on actual > > Microchip PolarFire SoC Icicle Kit. > > > > Changes in v5: > > - Replace compatible string "microchip,polarfire-soc" with > > "microchip,mpfs-icicle-kit" in the device tree > > - Use "mpfs" as identifier in place of "polarfire-soc", "pfsoc" > > - Fix some typos in doc > > - Rename the clock driver files clk_pfsoc_* to mpfs_clk_* > > - Rename pfsoc-clock.h to mpfs-clock.h > > > > Changes in v4: > > - Add dual-license GPL or MIT in the device tree > > - Replace microsemi compatible strings with microchip > > - Add MACB compatible string for Microchip PolarFire SoC ethernet > > - Update MACB driver for 32-bit/64-bit DMA based on compatible string > > > > Changes in v3: > > - Add 'default y if 64BIT' for config DMA_ADDR_T_64BIT > > - Update MACB driver for 32-bit/64-bit DMA based on design config > register > > - Add phy-handle in MACB driver to read the phy address from device tree > > - Fix checkpatch warnings in the clock driver > > - Remove fu540 related compatible strings from soc device tree node > > - Move refclk device tree node under /soc device tree node > > - Use local-mac-address instead of mac-address in the device tree > > - Rename device tree to microchip-mpfs-icicle-kit.dts > > - Add U-Boot specific dts microchip-mpfs-icicle-kit-u-boot.dtsi file > > - Drop the imply DMA_ADDR_T_64BIT from board config > > - Fix some typos > > - Update doc with Microchip and Custom boot-flow > > > > Changes in v2: > > - Add clock frequency for the clint device tree node > > - Move peripheral device tree nodes under /soc device tree node > > - Device tree nodes are in order based on the address > > - Enable UART0 for U-Boot logs > > - Update doc for the U-Boot logs are on UART0 > > - Move clock and reset index source into patch4 > > - Remove "dma_addr_r" type in the macb driver > > - Add lower_32_bits() for 32-bit address in the macb driver > > - Add set_rate() returns the new clock rate in the clock driver > > > > Padmarao Begari (7): > > riscv: Add DMA 64-bit address support > > net: macb: Add DMA 64-bit address support for macb > > net: macb: Add phy address to read it from device tree > > clk: Add Microchip PolarFire SoC clock driver > > riscv: dts: Add device tree for Microchip Icicle Kit > > riscv: Add Microchip MPFS Icicle Kit support > > doc: board: Add Microchip MPFS Icicle Kit doc > > > > Please check about the CI failure item Job #95.59 > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/748298546 > > ok, the underline is too short for Microchip name in the index.rst file. I will fix it in PATCH v6 Regards Padmarao > Thanks, > Rick > > > arch/riscv/Kconfig | 4 + > > arch/riscv/dts/Makefile | 1 + > > .../dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 14 + > > arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 421 +++++++++ > > arch/riscv/include/asm/types.h | 4 + > > board/microchip/mpfs_icicle/Kconfig | 24 + > > board/microchip/mpfs_icicle/mpfs_icicle.c | 97 +- > > configs/microchip_mpfs_icicle_defconfig | 9 +- > > doc/board/index.rst | 1 + > > doc/board/microchip/index.rst | 9 + > > doc/board/microchip/mpfs_icicle.rst | 830 ++++++++++++++++++ > > drivers/clk/Kconfig | 1 + > > drivers/clk/Makefile | 1 + > > drivers/clk/microchip/Kconfig | 5 + > > drivers/clk/microchip/Makefile | 1 + > > drivers/clk/microchip/mpfs_clk.c | 127 +++ > > drivers/clk/microchip/mpfs_clk.h | 19 + > > drivers/clk/microchip/mpfs_clk_cfg.c | 134 +++ > > drivers/clk/microchip/mpfs_clk_periph.c | 173 ++++ > > drivers/net/macb.c | 144 ++- > > drivers/net/macb.h | 6 + > > include/configs/microchip_mpfs_icicle.h | 60 +- > > .../dt-bindings/clock/microchip,mpfs-clock.h | 45 + > > 23 files changed, 2068 insertions(+), 62 deletions(-) > > create mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit-u-boot.dtsi > > create mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit.dts > > create mode 100644 doc/board/microchip/index.rst > > create mode 100644 doc/board/microchip/mpfs_icicle.rst > > create mode 100644 drivers/clk/microchip/Kconfig > > create mode 100644 drivers/clk/microchip/Makefile > > create mode 100644 drivers/clk/microchip/mpfs_clk.c > > create mode 100644 drivers/clk/microchip/mpfs_clk.h > > create mode 100644 drivers/clk/microchip/mpfs_clk_cfg.c > > create mode 100644 drivers/clk/microchip/mpfs_clk_periph.c > > create mode 100644 include/dt-bindings/clock/microchip,mpfs-clock.h > > > > -- > > 2.17.1 > > >
On Thu, Dec 10, 2020 at 11:03 AM Rick Chen <rickchen36@gmail.com> wrote: > > Hi Padmarao > > > From: Padmarao Begari [mailto:padmarao.begari@microchip.com] > > Sent: Thursday, December 03, 2020 4:32 AM > > To: u-boot@lists.denx.de; bmeng.cn@gmail.com; Rick Jian-Zhi Chen(陳建志); anup.patel@wdc.com; lukas.auer@aisec.fraunhofer.de; joe.hershberger@ni.com; lukma@denx.de; atish.patra@wdc.com > > Cc: cyril.jean@microchip.com; lewis.hanly@microchip.com; ivan.griffin@emdalo.com; daire.mcnamara@emdalo.com; conor.dooley@microchip.com; Padmarao Begari > > Subject: [PATCH v5 0/7] Microchip PolarFire SoC support > > > > This patch set adds Microchip PolarFire SoC Icicle Kit support > > to RISC-V U-Boot. > > > > The patches are based upon latest U-Boot tree > > (https://gitlab.denx.de/u-boot/u-boot.git) at commit id > > 80cbd731df50b9ab646940ea862b70bcaff37225 > > > > All drivers namely: NS16550 Serial, Microchip clock, > > Cadence eMMC and Cadence MACB Ethernet work fine on actual > > Microchip PolarFire SoC Icicle Kit. > > > > Changes in v5: > > - Replace compatible string "microchip,polarfire-soc" with > > "microchip,mpfs-icicle-kit" in the device tree > > - Use "mpfs" as identifier in place of "polarfire-soc", "pfsoc" > > - Fix some typos in doc > > - Rename the clock driver files clk_pfsoc_* to mpfs_clk_* > > - Rename pfsoc-clock.h to mpfs-clock.h > > > > Changes in v4: > > - Add dual-license GPL or MIT in the device tree > > - Replace microsemi compatible strings with microchip > > - Add MACB compatible string for Microchip PolarFire SoC ethernet > > - Update MACB driver for 32-bit/64-bit DMA based on compatible string > > > > Changes in v3: > > - Add 'default y if 64BIT' for config DMA_ADDR_T_64BIT > > - Update MACB driver for 32-bit/64-bit DMA based on design config register > > - Add phy-handle in MACB driver to read the phy address from device tree > > - Fix checkpatch warnings in the clock driver > > - Remove fu540 related compatible strings from soc device tree node > > - Move refclk device tree node under /soc device tree node > > - Use local-mac-address instead of mac-address in the device tree > > - Rename device tree to microchip-mpfs-icicle-kit.dts > > - Add U-Boot specific dts microchip-mpfs-icicle-kit-u-boot.dtsi file > > - Drop the imply DMA_ADDR_T_64BIT from board config > > - Fix some typos > > - Update doc with Microchip and Custom boot-flow > > > > Changes in v2: > > - Add clock frequency for the clint device tree node > > - Move peripheral device tree nodes under /soc device tree node > > - Device tree nodes are in order based on the address > > - Enable UART0 for U-Boot logs > > - Update doc for the U-Boot logs are on UART0 > > - Move clock and reset index source into patch4 > > - Remove "dma_addr_r" type in the macb driver > > - Add lower_32_bits() for 32-bit address in the macb driver > > - Add set_rate() returns the new clock rate in the clock driver > > > > Padmarao Begari (7): > > riscv: Add DMA 64-bit address support > > net: macb: Add DMA 64-bit address support for macb > > net: macb: Add phy address to read it from device tree > > clk: Add Microchip PolarFire SoC clock driver > > riscv: dts: Add device tree for Microchip Icicle Kit > > riscv: Add Microchip MPFS Icicle Kit support > > doc: board: Add Microchip MPFS Icicle Kit doc > > > > Please check about the CI failure item Job #95.59 > https://travis-ci.org/github/rickchen36/u-boot-riscv/jobs/748298546 I would like to also take a look at the changes today. Regards, Bin