From patchwork Tue Nov 10 05:55:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Siew Chin Lim X-Patchwork-Id: 1397311 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CVcYN1p1Cz9sRK for ; Tue, 10 Nov 2020 16:56:08 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D513382544; Tue, 10 Nov 2020 06:55:51 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 0B8ED8252A; Tue, 10 Nov 2020 06:55:44 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=0.4 required=5.0 tests=AC_FROM_MANY_DOTS,BAYES_00, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E14EF822D2 for ; Tue, 10 Nov 2020 06:55:40 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=elly.siew.chin.lim@intel.com IronPort-SDR: GtNwCQZWQ3XM+o64Bobb1SjasvuWb9PvoawNlMYS6d6YTKfXBo3Ssa8oqwch2sLGrQZ4cFlBYL 9TRs/E7cxjQw== X-IronPort-AV: E=McAfee;i="6000,8403,9800"; a="187884378" X-IronPort-AV: E=Sophos;i="5.77,465,1596524400"; d="scan'208";a="187884378" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2020 21:55:36 -0800 IronPort-SDR: rUT32kTFWVCkv0KvKI6SydgX/IzeyjKrdE+jI9OOemSfvonM8c0+etTrToozHqrsDDkf+lFp8M A8tXJmW5Lx3g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,465,1596524400"; d="scan'208";a="365360219" Received: from sj-iccf0114.altera.com ([10.100.9.104]) by FMSMGA003.fm.intel.com with ESMTP; 09 Nov 2020 21:55:36 -0800 From: Siew Chin Lim To: u-boot@lists.denx.de Cc: Marek Vasut , Ley Foon Tan , Chin Liang See , Simon Goldschmidt , Tien Fong Chee , Dalon Westergreen , Simon Glass , Yau Wai Gan , Siew Chin Lim Subject: [v2 00/22] Add Intel Diamond Mesa SoC support Date: Mon, 9 Nov 2020 21:55:11 -0800 Message-Id: <20201110055533.25720-1-elly.siew.chin.lim@intel.com> X-Mailer: git-send-email 2.13.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean This is the 2nd version of patchset add Intel Diamond Mesa SoC[1] support. Intel Diamond Mesa SoC is with a 64-bit quad core ARM Cortex-A53 MPCore hard processor system (HPS). New IPs in Diamond Mesa are clock manager and DDR subsystem, other IPs have minor changes compared to Agilex. Patch status: Have changes: Patch 20, 22 Other patches unchanged. Detail changelog can find in commit message. v1->v2: -------- Patch 20: - Include binman node device tree object (socfpga_soc64_fit-u-boot.dtsi_ in socfpga_dm-u-boot.dtsi Patch 22: - Add "CONFIG_USE_SPL_FIT_GENERATE is not set" to socfpga_dm_atf_defconfig. Use binman to generate FIT image instead of local script. History: -------- [v1]: https://patchwork.ozlabs.org/project/uboot/cover/20200922094930.100855-1-elly.siew.chin.lim@intel.com/ These patchsets have dependency on: Enable ARM Trusted Firmware for U-Boot https://patchwork.ozlabs.org/project/uboot/cover/20201015122955.10259-1-elly.siew.chin.lim@intel.com/ [1]: https://www.intel.com/content/www/us/en/products/programmable/asic/easic-devices/diamond-mesa-soc-devices.html Chee Hong Ang (14): arm: socfpga: Add function for checking description from FIT image arm: socfpga: soc64: Load FIT image with ATF support arm: socfpga: soc64: Override 'lowlevel_init' to support ATF arm: socfpga: Disable "spin-table" method for booting Linux arm: socfpga: soc64: Add SMC helper function for Intel SOCFPGA (64bits) arm: socfpga: soc64: Define SMC function identifiers for PSCI SiP services mmc: dwmmc: socfpga: Add ATF support for MMC driver net: designware: socfpga: Add ATF support for MAC driver arm: socfpga: soc64: Add ATF support for Reset Manager driver arm: socfpga: soc64: Add ATF support for FPGA reconfig driver arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to mbox_reset_cold() arm: socfpga: soc64: SSBL shall not setup stack on OCRAM arm: socfpga: soc64: Skip handoff data access in SSBL configs: socfpga: Add defconfig for Agilex and Stratix 10 with ATF support Pali Rohár (1): Makefile: Fix calling make with V=1 Siew Chin Lim (2): arm: socfpga: dts: soc64: Add binman node of FIT image with ATF support arm: socfpga: soc64: Enable FIT image generation using binman Simon Glass (5): odroid-c2: Use devicetree for SMBIOS settings arm64: mvebu: Use devicetree for SMBIOS settings on uDPU x86: galileo: Use devicetree for SMBIOS settings x86: Provide default SMBIOS manufacturer/product smbios: Drop the unused Kconfig options