From patchwork Thu Oct 22 07:07:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Padmarao Begari X-Patchwork-Id: 1386002 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=kowh4GEx; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CGzLy53bjz9sTc for ; Thu, 22 Oct 2020 18:21:46 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2340882423; Thu, 22 Oct 2020 09:21:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="kowh4GEx"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 0AE748240E; Thu, 22 Oct 2020 09:21:40 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL, SPF_HELO_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from esa4.microchip.iphmx.com (esa4.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1978E8240E for ; Thu, 22 Oct 2020 09:21:30 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=Padmarao.Begari@microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1603351291; x=1634887291; h=from:to:cc:subject:date:message-id:mime-version; bh=CgLnpyQx6ktVBa46wsv89/zVKrjLsGdIc1ZGJG5UZtQ=; b=kowh4GEx/jAfbRxqhyX6ij7ZiSFRa9OMvzzgP0odlNuSEuYVQWsnwN/Z MVivNwAWGKg/4Tl9B1ZplslNOF4QRhQu/P67cn5CRp85zv1fAro2A2Uub LTvY9vrv2u2hR8DCX2WSzGyHWbLmr9GX92A8HEaI8cA7fvPsJHJAuKVRi fywOHU6E2ozociA9icOSyImeYzc5w3Xn78S/fPX55uLznbr/OuSD2+BLq Qcc7Z5isn4o4+h0He0mt6hLZEgc3za4vuXIGtTab2k6K9fHveDr7jtmG5 jSYSkymWeuRy7/bt/M7ETH07EMZ/kNY0ASNzNh+7IXnN2GAIFVLZ+1IXc g==; IronPort-SDR: 699h0nvSrl2xj/oEZI2TYQKJemr3Jyjdz/cs+pjTZ03NUgvrC9c8AVxcArL0tEgimje61Ka+Ce pjcdtRquKFYNiaR34552FMSER8mWLfLq9DhhM2dNqbpFN2TlXOfeEh2KxC5L+ghp/KQNe/LjqK BBoB/e5/N2x6SWudq00IOmVbxGuKCVDuxIHstbPqoCqPVsSF1Zva8w7c3pZLafOMvOpdQjUaId /QdTFw14zy0HNiOASTuNtXvAw7HhYfPIdvmx4IWH8G2cHM9g7bB8mUMFlLrbpHkx4x0X0eljXZ RuM= X-IronPort-AV: E=Sophos;i="5.77,404,1596524400"; d="scan'208";a="91022882" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 22 Oct 2020 00:21:28 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 22 Oct 2020 00:19:33 -0700 Received: from padmarao-VirtualBox.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 22 Oct 2020 00:19:27 -0700 From: Padmarao Begari To: , , , , , , CC: , , , , , Padmarao Begari Subject: [PATCH v2 0/7] Microchip PolarFire SoC support Date: Thu, 22 Oct 2020 12:37:08 +0530 Message-ID: <20201022070715.14759-1-padmarao.begari@microchip.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean This patch set adds Microchip PolarFire SoC Icicle Kit support to RISC-V U-Boot. The patches are based upon latest U-Boot tree (https://gitlab.denx.de/u-boot/u-boot.git) at commit id 5d92dacbbe8a751e95f0ad0cf7c3d2370e9a04c7 All drivers namely: NS16550 Serial, Microchip clock, Cadence eMMC and Cadence MACB Ethernet work fine on actual Microchip PolarFire SoC Icicle Kit. Changes in v2: - Add clock frequency for the clint device tree node - Move peripheral device tree nodes under /soc device tree node - Device tree nodes are in order based on the address - Enable UART0 for U-Boot logs - Update doc for the U-Boot logs are on UART0 - Move clock and reset index source into patch4 - Remove "dma_addr_r" type in the macb driver - Add lower_32_bits() for 32-bit address in the macb driver - Add set_rate() returns the new clock rate in the clock driver Padmarao Begari (7): riscv: Add DMA 64-bit address support net: macb: Add DMA 64-bit address support for macb net: macb: Add phy address to read it from device tree clk: Add Microchip PolarFire SoC clock driver riscv: dts: Add device tree for Microchip Icicle Kit riscv: Add Microchip MPFS Icicle Kit support doc: board: Add Microchip MPFS Icicle Kit doc arch/riscv/Kconfig | 5 + arch/riscv/dts/Makefile | 1 + arch/riscv/dts/microchip-icicle-kit-a000.dts | 426 ++++++++++++ arch/riscv/include/asm/types.h | 4 + board/microchip/mpfs_icicle/Kconfig | 25 + board/microchip/mpfs_icicle/mpfs_icicle.c | 96 ++- configs/microchip_mpfs_icicle_defconfig | 9 +- doc/board/index.rst | 1 + doc/board/microchip/index.rst | 9 + doc/board/microchip/mpfs_icicle.rst | 605 ++++++++++++++++++ drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/microchip/Kconfig | 5 + drivers/clk/microchip/Makefile | 1 + drivers/clk/microchip/clk_pfsoc.c | 127 ++++ drivers/clk/microchip/clk_pfsoc.h | 19 + drivers/clk/microchip/clk_pfsoc_cfg.c | 134 ++++ drivers/clk/microchip/clk_pfsoc_periph.c | 173 +++++ drivers/net/macb.c | 61 +- drivers/net/macb.h | 6 + include/configs/microchip_mpfs_icicle.h | 60 +- .../dt-bindings/clock/microchip,pfsoc-clock.h | 45 ++ 22 files changed, 1761 insertions(+), 53 deletions(-) create mode 100644 arch/riscv/dts/microchip-icicle-kit-a000.dts create mode 100644 doc/board/microchip/index.rst create mode 100644 doc/board/microchip/mpfs_icicle.rst create mode 100644 drivers/clk/microchip/Kconfig create mode 100644 drivers/clk/microchip/Makefile create mode 100644 drivers/clk/microchip/clk_pfsoc.c create mode 100644 drivers/clk/microchip/clk_pfsoc.h create mode 100644 drivers/clk/microchip/clk_pfsoc_cfg.c create mode 100644 drivers/clk/microchip/clk_pfsoc_periph.c create mode 100644 include/dt-bindings/clock/microchip,pfsoc-clock.h