mbox series

[00/32] x86: Allow Coral to boot into Chrome OS

Message ID 20200928042611.1696178-1-sjg@chromium.org
Headers show
Series x86: Allow Coral to boot into Chrome OS | expand

Message

Simon Glass Sept. 28, 2020, 4:25 a.m. UTC 
This series adds various minor features and tweaks to allow Coral to boot
into Chrome OS from U-Boot.

It relies on three other series which have been recently sent:

   - smbios (u-boot-dm/smbios-working)
   - bootm (u-boot-dm/bootm-working)
   - misca (u-boot-dm/misca-working)

This should provide a solid base for using ACPI on other Intel Apollo Lake
(APL) devices.


Simon Glass (32):
  Add an assembly guard around linux/bitops.h
  x86: apl: Add core init for the SoC
  x86: Add a layout for Chrome OS verified boot
  x86: Add support for private files
  x86: Allow writing tables to fail
  x86: acpi: Store the ACPI context in global_data
  x86: Store the FADT so we can avoid searching for it
  x86: Don't bother clearing global NVS
  x86: coral: Drop the duplicate PCIe settings
  x86: Add SMBIOS info for Coral
  x86: coral: Correct max98357 file
  x86: Move ROM_TABLE_ADDR into the C file
  x86: Use if instead of #ifdef in write_tables()
  x86: Allow putting some tables in the bloblist
  x86: nhlt: Correct output of bytes and 16-bit data
  x86: nhlt: Fix a few bugs in the table generation
  x86: Show the interrupt pointer with 'irqinfo'
  x86: sound: Correct error handling
  acpi: Correct reset handling in acpi_device_add_power_res()
  x86: acpi: Allow the SSDT to be empty
  x86: acpi: Put the generated code first in DSDT
  acpi: Don't reset the tables with every new generation
  x86: Define the Chrome OS GNVS region
  x86: Use CONFIG_CHROMEOS_VBOOT for verified boot
  x86: Set up Chrome OS to boot into developer mode
  x86: Boot coral into Chrome OS by default
  x86: fsp: Convert fsp_dram to use log_debug()
  x86: Silence some logging statements
  x86: acpi: Include the TPMv1 table only if needed
  x86: acpi: Don't show the UART address by default
  x86: pinctrl: Silence the warning when a pin is not found
  x86: fsp: Adjust calculations for MTRR range and DRAM top

 Kconfig                                       |   8 ++
 arch/x86/cpu/apollolake/acpi.c                |  25 ++++-
 arch/x86/cpu/apollolake/cpu.c                 |  84 ++++++++++++++++
 arch/x86/cpu/apollolake/cpu_common.c          |  25 +++++
 arch/x86/cpu/apollolake/cpu_spl.c             |  20 ----
 arch/x86/cpu/apollolake/fsp_s.c               |   8 +-
 arch/x86/cpu/cpu.c                            |  13 ++-
 arch/x86/cpu/i386/interrupt.c                 |  14 +--
 arch/x86/cpu/intel_common/acpi.c              |   1 -
 arch/x86/cpu/intel_common/cpu.c               |  19 ++++
 arch/x86/cpu/intel_common/intel_opregion.c    |   2 +-
 arch/x86/cpu/intel_common/itss.c              |   8 +-
 arch/x86/dts/chromebook_coral.dts             |  12 ++-
 arch/x86/dts/chromebook_samus.dts             |   2 +-
 arch/x86/dts/u-boot.dtsi                      |   4 +
 arch/x86/include/asm/acpi.h                   |   9 --
 arch/x86/include/asm/acpi/vbnv_layout.h       |  38 +++++++
 arch/x86/include/asm/arch-apollolake/cpu.h    |   7 ++
 arch/x86/include/asm/cpu_common.h             |   2 +
 arch/x86/include/asm/intel_gnvs.h             |  52 +++++++++-
 arch/x86/include/asm/interrupt.h              |  17 ++++
 arch/x86/include/asm/msr-index.h              |  20 +++-
 arch/x86/include/asm/tables.h                 |  12 +--
 arch/x86/lib/acpi.c                           |  57 -----------
 arch/x86/lib/acpi_nhlt.c                      |  19 +++-
 arch/x86/lib/acpi_table.c                     |  79 ++++++++++-----
 arch/x86/lib/fsp/fsp_dram.c                   |  35 ++++---
 arch/x86/lib/fsp/fsp_graphics.c               |   2 +-
 arch/x86/lib/fsp2/fsp_dram.c                  |   8 +-
 arch/x86/lib/interrupts.c                     |   3 +
 arch/x86/lib/tables.c                         |  93 ++++++++++++++----
 arch/x86/lib/tpl.c                            |   2 +-
 .../max98357-render-2ch-48khz-24b.dat         | Bin 0 -> 116 bytes
 configs/chromebook_coral_defconfig            |  13 ++-
 drivers/core/acpi.c                           |  10 +-
 drivers/pinctrl/intel/pinctrl.c               |   2 +-
 drivers/sound/da7219.c                        |   4 +-
 drivers/sound/max98357a.c                     |   2 +-
 include/acpi/acpi_table.h                     |  10 ++
 include/asm-generic/global_data.h             |   5 +
 include/configs/chromebook_coral.h            |   9 +-
 include/dm/acpi.h                             |  11 +++
 include/linux/bitops.h                        |   4 +-
 lib/Kconfig                                   |   9 ++
 lib/acpi/acpi_device.c                        |   2 +-
 lib/acpi/acpi_table.c                         |   4 +-
 test/dm/acpi.c                                |   4 +
 47 files changed, 573 insertions(+), 216 deletions(-)
 create mode 100644 arch/x86/include/asm/acpi/vbnv_layout.h

Comments

Simon Glass Sept. 28, 2020, 4:25 a.m. UTC | #1 
This somehow ended up as an empty file. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 .../max98357-render-2ch-48khz-24b.dat             | Bin 0 -> 116 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/board/google/chromebook_coral/max98357-render-2ch-48khz-24b.dat b/board/google/chromebook_coral/max98357-render-2ch-48khz-24b.dat
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..b0b5b9ba648c4546f98e15e42356a5fc4af6bb27 100644
GIT binary patch
literal 116
zcmZQzU|?WnWOx?=qy_%}|BnyXGahJUU??~MR0;$VT+Bccgqa+G1PJi6vnv28CMf>T
R&%gk}Aix2{5<r{+!~hE!AMpSH

literal 0
HcmV?d00001
Bin Meng Oct. 16, 2020, 1:34 p.m. UTC | #2 
Hi Simon,

On Mon, Sep 28, 2020 at 12:26 PM Simon Glass <sjg@chromium.org> wrote:
>
> This somehow ended up as an empty file. Fix it.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
>  .../max98357-render-2ch-48khz-24b.dat             | Bin 0 -> 116 bytes
>  1 file changed, 0 insertions(+), 0 deletions(-)
>
> diff --git a/board/google/chromebook_coral/max98357-render-2ch-48khz-24b.dat b/board/google/chromebook_coral/max98357-render-2ch-48khz-24b.dat
> index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..b0b5b9ba648c4546f98e15e42356a5fc4af6bb27 100644
> GIT binary patch
> literal 116
> zcmZQzU|?WnWOx?=qy_%}|BnyXGahJUU??~MR0;$VT+Bccgqa+G1PJi6vnv28CMf>T
> R&%gk}Aix2{5<r{+!~hE!AMpSH
>
> literal 0
> HcmV?d00001
>
> --

This patch seems not to be arriving on patchwork. Could you please
check what's wrong?

Regards,
Bin