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[108.51.35.162]) by smtp.gmail.com with ESMTPSA id c70sm8658105qkg.4.2020.09.21.04.51.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2020 04:51:53 -0700 (PDT) From: Sean Anderson To: u-boot@lists.denx.de Cc: Heinrich Schuchardt , Rick Chen , alankao@andestech.com, Leo Liang , Bin Meng , Sean Anderson Subject: [PATCH v3 0/7] riscv: Correctly handle IPIs already pending upon boot Date: Mon, 21 Sep 2020 07:51:34 -0400 Message-Id: <20200921115141.70598-1-seanga2@gmail.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean On the K210, the prior stage bootloader does not clear IPIs. This presents a problem, because U-Boot up until this point assumes (with one exception) that IPIs are cleared when it starts. This series attempts to fix this in a robust manner, and fix several concurrency bugs I noticed while fixing these other areas. Heinrich previously submitted a patch addressing part of this problem in [1]. [1] https://patchwork.ozlabs.org/project/uboot/patch/20200811035648.3284-1-xypron.glpk@gmx.de/ Changes in v3: - Rename riscv_ipi_init_secondary_hart to dummy_pending_ipi_clear - Only compile dummy_pending_ipi_clear when SMP is enabled - Clarify XIP comment - Updated and expanded most commit messages Changes in v2: - Use a valid bit instead of addr to validate IPIs - Make riscv_ipi_init_secondary_hart static - Remove fences after amoswaps - Set gp early with XIP - Clarify comments regarding tp Sean Anderson (7): Revert "riscv: Clear pending interrupts before enabling IPIs" riscv: Match memory barriers between send_ipi_many and handle_ipi riscv: Use a valid bit to ignore already-pending IPIs riscv: Clear pending IPIs on initialization riscv: Consolidate fences into AMOs for available_harts_lock riscv: Ensure gp is NULL or points to valid data riscv: Add some comments to start.S arch/riscv/cpu/cpu.c | 20 +++++++++++++ arch/riscv/cpu/start.S | 58 ++++++++++++++++++++++++++++-------- arch/riscv/include/asm/smp.h | 7 +++++ arch/riscv/lib/interrupts.c | 3 +- arch/riscv/lib/smp.c | 16 +++++++++- 5 files changed, 89 insertions(+), 15 deletions(-)