From patchwork Sat Dec 21 18:13:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1214556 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="NibnATNL"; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47gDK21lMHz9sP6 for ; Sun, 22 Dec 2019 05:14:10 +1100 (AEDT) Received: from phobos.denx.de (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C3061808B6; Sat, 21 Dec 2019 19:14:01 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="NibnATNL"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7D6CE808E0; Sat, 21 Dec 2019 19:13:59 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.1 required=5.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd42.google.com (mail-io1-xd42.google.com [IPv6:2607:f8b0:4864:20::d42]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id BB9D5807F8 for ; Sat, 21 Dec 2019 19:13:55 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd42.google.com with SMTP id x1so12571883iop.7 for ; Sat, 21 Dec 2019 10:13:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=vpOGDjrBWdShNKeAq/PnnZcqC2okHvmIHB4ULGeQYAo=; b=NibnATNLrYBoaMzasVgvSao3KugkKcbT5mGd5TvtUGtTJ7YQYFWCo6UUEWSmj3jsjQ b2VpBXbWPzQVWJACzSrFy0PJPzezRN9vDmttZIsrNu5faWJjFwM8M1YwfownSwsgaPh9 iumRLcswrOeNxF0cHA5QG/223nw1ByfH6PIgA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=vpOGDjrBWdShNKeAq/PnnZcqC2okHvmIHB4ULGeQYAo=; b=n3BZO1WmsN/8p5pouAfyzVYU5qU39TJtvMzNfPeKgxk+UVq++17dNDICqvxVx5GhaY qX9EkLsKx+VL3t/0Zd3y2z8QkHQ6lC45q2Cx9Ay/Qn25k716BZ6EkY3avpS6GrmSkCjt W/lSAZqvsrEWGwO12HBGNEfLn5pyA70TIZBo+SKTFwNUbRUkHgsT2NlGBwI5KoY2ZZ8Z cuU2ncajBlP9CvuhwTx9uM7ZcNLaUH+Y455ufKjLheaNE5EeTn3l9Xld5N7roZ43AC1c JAfoxO+SXLE0sFziT/QLbeE8yrMALh4Og6bRPVpM1+kRVssnzDP/uCWVWiuLLtA7jPVy VYrw== X-Gm-Message-State: APjAAAUR4Kw/OkzUMgub16u9zQ9RVSf921po42bE8dyQT+udMBWtOdhf bDWN/njInA/Zv/vMDwzRn00E9RAHHKs= X-Google-Smtp-Source: APXvYqwc0wxsE9hDY99UKhAQLMeYz+sUXbxT5voW/1gAxkYGD8q52Y4OQa4Zh+cF5HRl+nTuH5mqLA== X-Received: by 2002:a5e:8b44:: with SMTP id z4mr14407131iom.271.1576952033905; Sat, 21 Dec 2019 10:13:53 -0800 (PST) Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) by smtp.gmail.com with ESMTPSA id p5sm7058709ilg.69.2019.12.21.10.13.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 Dec 2019 10:13:53 -0800 (PST) From: Simon Glass To: U-Boot Mailing List Subject: [PATCH v2 00/13] x86: coral: Add support for Cr50 Date: Sat, 21 Dec 2019 11:13:35 -0700 Message-Id: <20191221181348.48154-1-sjg@chromium.org> X-Mailer: git-send-email 2.24.1.735.g03f4e72817-goog MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ramon Fried , Vagrant Cascadian , Heinrich Schuchardt , Andy Shevchenko , Pavel Herrmann Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de X-Virus-Status: Clean This series adds a driver for the Cr50 security chip and enables it on coral. This supports the 'tpm' command. In order to make this work a few other changes are included: - Additional UCLASS_IRQ operations to support requesting and reading interrupts, using the device tree - A driver for ACPI general-purpose events There are also a few small clean-ups to the recently landed Apollo Lake support. This series relies on this patch: http://patchwork.ozlabs.org/patch/1214541/ Changes in v2: - Significant rewrite of cr50 init procedure - Support use of interrupts - Update the commit message - Add new patches to handle requesting interrupts and interrupt state Simon Glass (13): x86: Add a clock driver for Intel devices x86: apl: Use the clock driver x86: apl: Drop the I2C config in FSP-S x86: coral: Update i2c and rtc status dm: irq: Add support for interrupt controller types x86: Give each driver an IRQ type x86: itss: Add of-platdata support dm: irq: Add support for requesting interrupts x86: Add support for ACPI general-purpose events x86: coral: Add I2C and TPM device-tree definitions tpm: Add more TPM2 definitions tpm: Add a driver for H1/Cr50 x86: coral: Enable TPM arch/sandbox/dts/test.dts | 5 +- arch/sandbox/include/asm/test.h | 4 + arch/x86/Kconfig | 33 + arch/x86/cpu/Makefile | 1 + arch/x86/cpu/acpi_gpe.c | 85 +++ arch/x86/cpu/apollolake/Kconfig | 4 + arch/x86/cpu/apollolake/fsp_s.c | 62 +- arch/x86/cpu/apollolake/itss.c | 12 +- arch/x86/cpu/i386/interrupt.c | 3 +- arch/x86/cpu/irq.c | 3 +- arch/x86/dts/chromebook_coral.dts | 93 +++ configs/chromebook_coral_defconfig | 3 +- doc/board/google/chromebook_coral.rst | 2 - .../interrupt-controller/intel,acpi-gpe.txt | 30 + .../interrupt-controller/interrupts.txt | 131 ++++ drivers/clk/Kconfig | 10 + drivers/clk/Makefile | 1 + drivers/clk/intel/Makefile | 6 + drivers/clk/intel/clk_intel.c | 41 ++ drivers/misc/irq-uclass.c | 140 +++- drivers/misc/irq_sandbox.c | 43 +- drivers/pinctrl/intel/pinctrl.c | 2 +- drivers/tpm/Kconfig | 10 + drivers/tpm/Makefile | 1 + drivers/tpm/cr50_i2c.c | 661 ++++++++++++++++++ include/dt-bindings/clock/intel-clock.h | 15 + include/irq.h | 138 ++++ include/tpm-v2.h | 31 + test/dm/irq.c | 45 ++ 29 files changed, 1545 insertions(+), 70 deletions(-) create mode 100644 arch/x86/cpu/acpi_gpe.c create mode 100644 doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt create mode 100644 doc/device-tree-bindings/interrupt-controller/interrupts.txt create mode 100644 drivers/clk/intel/Makefile create mode 100644 drivers/clk/intel/clk_intel.c create mode 100644 drivers/tpm/cr50_i2c.c create mode 100644 include/dt-bindings/clock/intel-clock.h