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DIR:OUT; SFP:1102; SCL:1; SRVR:MN2PR04MB5614; H:MN2PR04MB6061.namprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 3RTvd1fbMk0Q8DQq4ousZa6qxeJwoutq9lgXor6pYvtFa5i0S/A5xa3VWEQPAMotLBUKNU11PiEThoItwNexPTUI8IjAgbmQVkfuXjQq6Mb7G5LpOLjgfHyiKlgJoXB+YcRZbfnw47+kTfvHn5jA2wstM7GlHfJgQKbfuGcYuF53K+AHbiJzAtPiEIvGk7xY4GLmkovAB4OjtEZT1Dvh+/yHpTiURDsA1YhlJX3YE++kZSc19V2AaaQAx0hJF2W6MgjrMcSBrZmC9yNQDaQMjNAErFblx8UYif/hptcgeiH5VPTJ+d08M/oODmlxiHmiHsWaG5mFz4kmTOgslbuWjyyKYaLpWBmWkttMyrNR5p7gWUlUse8X2A02pDIj5Zbzt/kwwtIdTKKo3vyUa+pIgvONbAo3d0ppuCp3SYBRYTM= MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: ab262dfe-12e1-4204-9075-08d6f483ede0 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Jun 2019 07:01:19.6529 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Anup.Patel@wdc.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR04MB5614 Cc: Palmer Dabbelt , U-Boot Mailing List Subject: [U-Boot] [PATCH v3 0/5] Update SiFive Unleashed Drivers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This series update SiFive Unleashed clock driver so that: 1. It is in sync with upstream Linux driver 2. It uses latest DT bindings as-per upstream Linux driver With this series, we can now use latest DT bindings with U-Boot. I have tested SiFive Serial driver and Cadence MACB ethernet driver with this changes and both work fine. The legacy FSBL will still pass DTB to U-Boot with older DT bindings which will break the updated SiFive Unleashed clock driver. To tackle this, we have embedded DTB in OpenSBI FW_PAYLOAD firmware for SiFive Unleashed so that OpenSBI will override and pass updated DTB to U-Boot. In fact, the updated DTB passed by OpenSBI can be used by latest Linux (i.e. V5.2-rc1 or higher) as well. The OpenSBI changes to embed SiFive Unleashed DTB can be found in sifive_unleashed_dtb_fix_v3 branch of: https://github.com/avpatel/opensbi.git This series can be found in riscv_unleashed_clk_sync_v3 branch of: https://github.com/avpatel/u-boot.git Changes since v2: - Dropped PATCH6 which adds new compatible string to MACB driver because more changes are required in MACB driver for different ethernet speeds Changes since v1: - Dropped GEMGXL clock driver - Added new compatible string for SiFive MACB ethernet Anup Patel (5): clk: sifive: Factor-out PLL library as separate module clk: sifive: Sync-up WRPLL library with upstream Linux clk: sifive: Sync-up DT bindings header with upstream Linux clk: sifive: Sync-up main driver with upstream Linux clk: sifive: Drop GEMGXL clock driver board/sifive/fu540/Kconfig | 1 - drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/analogbits/Kconfig | 4 + drivers/clk/analogbits/Makefile | 3 + .../{sifive => analogbits}/wrpll-cln28hpc.c | 168 ++++++++---------- drivers/clk/sifive/Kconfig | 10 -- drivers/clk/sifive/Makefile | 4 - drivers/clk/sifive/fu540-prci.c | 123 +++++++------ drivers/clk/sifive/gemgxl-mgmt.c | 60 ------- include/dt-bindings/clk/sifive-fu540-prci.h | 29 --- include/dt-bindings/clock/sifive-fu540-prci.h | 18 ++ .../linux/clk}/analogbits-wrpll-cln28hpc.h | 70 +++----- 13 files changed, 195 insertions(+), 297 deletions(-) create mode 100644 drivers/clk/analogbits/Kconfig create mode 100644 drivers/clk/analogbits/Makefile rename drivers/clk/{sifive => analogbits}/wrpll-cln28hpc.c (69%) delete mode 100644 drivers/clk/sifive/gemgxl-mgmt.c delete mode 100644 include/dt-bindings/clk/sifive-fu540-prci.h create mode 100644 include/dt-bindings/clock/sifive-fu540-prci.h rename {drivers/clk/sifive => include/linux/clk}/analogbits-wrpll-cln28hpc.h (52%) --- 2.17.1