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[U-Boot,0/2] clk: at91: utmi: Fix to set the main clock

Message ID 20170905103008.3099-1-wenyou.yang@microchip.com
Headers show
Series clk: at91: utmi: Fix to set the main clock | expand

Message

Wenyou Yang Sept. 5, 2017, 10:30 a.m. UTC 
The source clock of the UTMI PLL is the main clock (MAINCK).
The MAINCK must select the fast crystal oscillator to meet
the frequency accuracy required by USB.
The crystal frequency selection among 12, 16, 24 MHz must be
configured to the correct value in the field SFR_UTMICKTRIM.FREQ,
in order to apply the correct multiplier, x40, x30 or x20,
respectively. By default, it is assumed that the UTMI clock is
generated from a 12 MHz MAINCK.


Wenyou Yang (2):
  clk: at91: utmi: Set the reference clock frequency
  ARM: dts: at91: sama5: Add the sfr node

 arch/arm/dts/sama5d2.dtsi                   |  6 +++
 arch/arm/dts/sama5d3.dtsi                   |  2 +
 arch/arm/mach-at91/include/mach/sama5_sfr.h |  5 ++
 drivers/clk/at91/Kconfig                    |  4 ++
 drivers/clk/at91/clk-utmi.c                 | 77 ++++++++++++++++++++++++++++-
 drivers/clk/at91/pmc.h                      |  3 ++
 6 files changed, 95 insertions(+), 2 deletions(-)