Message ID | 1582115146-28658-1-git-send-email-chee.hong.ang@intel.com |
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Headers | show
Return-Path: <u-boot-bounces@lists.denx.de> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48MxmJ6yX0z9sPK for <incoming@patchwork.ozlabs.org>; Wed, 19 Feb 2020 23:26:40 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D5B6380561; Wed, 19 Feb 2020 13:26:23 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id CBEE48025D; Wed, 19 Feb 2020 13:26:17 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, TO_NO_BRKTS_PCNT,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id AE53380199 for <u-boot@lists.denx.de>; Wed, 19 Feb 2020 13:26:11 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=chee.hong.ang@intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Feb 2020 04:26:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,459,1574150400"; d="scan'208";a="258902774" Received: from unknown (HELO admin-vm-ubuntu1604.localdomain) ([10.226.243.7]) by fmsmga004.fm.intel.com with ESMTP; 19 Feb 2020 04:26:07 -0800 From: chee.hong.ang@intel.com To: u-boot@lists.denx.de Cc: Marek Vasut <marex@denx.de>, Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>, Ching Liang See <chin.liang.see@intel.com>, Ley Foon Tan <ley.foon.tan@intel.com>, Dalon Westergteen <dalon.westergreen@intel.com>, Chee Hong Ang <chee.hong.ang@intel.com>, Richard Gong <richard.gong@intel.com> Subject: [PATCH v2 00/21] Enable ARM Trusted Firmware for U-Boot Date: Wed, 19 Feb 2020 04:25:25 -0800 Message-Id: <1582115146-28658-1-git-send-email-chee.hong.ang@intel.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion <u-boot.lists.denx.de> List-Unsubscribe: <https://lists.denx.de/options/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=unsubscribe> List-Archive: <https://lists.denx.de/pipermail/u-boot/> List-Post: <mailto:u-boot@lists.denx.de> List-Help: <mailto:u-boot-request@lists.denx.de?subject=help> List-Subscribe: <https://lists.denx.de/listinfo/u-boot>, <mailto:u-boot-request@lists.denx.de?subject=subscribe> Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de> X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean |
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Enable ARM Trusted Firmware for U-Boot
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From: "Ang, Chee Hong" <chee.hong.ang@intel.com> v2 changes: - Default defconfig support SPL + ATF + U-Boot boot flow: (socfpga_stratix10_defconfig / socfpga_agilex_defconfig) SPL (EL3) -> ATF-BL31 (EL3) -> U-Boot Proper (EL2) -> Linux (EL1) Added new defconfig to support existing SPL + U-Boot (no ATF) boot flow: (socfpga_stratix10_nofw_defconfig / socfpga_agilex_nofw_defconfig) SPL (EL3) -> U-Boot Proper (EL3) -> Linux (EL1) - SMC/PSCI calls (EL2) / secure code (EL3) is built in compile time - Mailbox/FPGA reconfiguration driver now support ATF or without ATF v1: https://lists.denx.de/pipermail/u-boot/2019-December/392424.html These patchsets have dependency on: https://lists.denx.de/pipermail/u-boot/2019-September/384906.html Chee Hong Ang (21): configs: agilex: Remove CONFIG_OF_EMBED arm: socfpga: add fit source file for pack itb with ATF arm: socfpga: Add function for checking description from FIT image arm: socfpga: Load FIT image with ATF support arm: socfpga: Override 'lowlevel_init' to support ATF configs: socfpga: Enable FIT image loading with ATF support arm: socfpga: Disable "spin-table" method for booting Linux arm: socfpga: Add SMC helper function for Intel SOCFPGA (64bits) arm: socfpga: Define SMC function identifiers for PSCI SiP services arm: socfpga: Add secure register access helper functions for SoC 64bits arm: socfpga: Secure register access for clock manager (SoC 64bits) arm: socfpga: Secure register access in PHY mode setup arm: socfpga: Secure register access for reading PLL frequency mmc: dwmmc: socfpga: Secure register access in MMC driver net: designware: socfpga: Secure register access in MAC driver arm: socfpga: Secure register access in Reset Manager driver arm: socfpga: stratix10: Initialize timer in SPL arm: socfpga: Bridge reset invokes SMC service calls in EL2 arm: socfpga: stratix10: Add ATF support to FPGA reconfig driver arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to mbox_reset_cold() configs: socfpga: Add defconfig for Agilex and Stratix 10 without ATF support arch/arm/mach-socfpga/Kconfig | 2 - arch/arm/mach-socfpga/Makefile | 8 + arch/arm/mach-socfpga/board.c | 10 + arch/arm/mach-socfpga/clock_manager_agilex.c | 5 +- arch/arm/mach-socfpga/clock_manager_s10.c | 5 +- arch/arm/mach-socfpga/include/mach/misc.h | 3 + .../mach-socfpga/include/mach/secure_reg_helper.h | 20 ++ arch/arm/mach-socfpga/lowlevel_init.S | 85 +++++ arch/arm/mach-socfpga/mailbox_s10.c | 4 + arch/arm/mach-socfpga/misc_s10.c | 49 ++- arch/arm/mach-socfpga/reset_manager_s10.c | 31 +- arch/arm/mach-socfpga/secure_reg_helper.c | 57 ++++ arch/arm/mach-socfpga/timer_s10.c | 3 +- arch/arm/mach-socfpga/wrap_pll_config_s10.c | 9 +- board/altera/soc64/its/fit_spl_atf.its | 52 +++ configs/socfpga_agilex_defconfig | 9 +- ...lex_defconfig => socfpga_agilex_nofw_defconfig} | 2 +- configs/socfpga_stratix10_defconfig | 8 +- ..._defconfig => socfpga_stratix10_nofw_defconfig} | 2 +- drivers/fpga/stratix10.c | 141 +++++++- drivers/mmc/socfpga_dw_mmc.c | 7 +- drivers/net/dwmac_socfpga.c | 5 +- include/configs/socfpga_soc64_common.h | 4 + include/linux/intel-smc.h | 374 +++++++++++++++++++++ 24 files changed, 857 insertions(+), 38 deletions(-) create mode 100644 arch/arm/mach-socfpga/include/mach/secure_reg_helper.h create mode 100644 arch/arm/mach-socfpga/lowlevel_init.S create mode 100644 arch/arm/mach-socfpga/secure_reg_helper.c create mode 100644 board/altera/soc64/its/fit_spl_atf.its copy configs/{socfpga_agilex_defconfig => socfpga_agilex_nofw_defconfig} (97%) copy configs/{socfpga_stratix10_defconfig => socfpga_stratix10_nofw_defconfig} (97%) create mode 100644 include/linux/intel-smc.h