| Message ID | 1408686773-3044-1-git-send-email-allen.pais@oracle.com |
|---|---|
| State | Changes Requested |
| Delegated to: | David Miller |
| Headers | show |
From: Allen Pais <allen.pais@oracle.com> Date: Fri, 22 Aug 2014 11:22:51 +0530 > The following patch adds support for correctly > recognising M7 cpu type. > > Signed-off-by: Allen Pais <allen.pais@oracle.com> I don't think this is correct. > @@ -414,6 +414,8 @@ sun4v_chip_type: > cmp %g2, 'T' > be,pt %xcc, 70f > cmp %g2, 'M' > + be,pt %xcc, 71f > + nop > bne,pn %xcc, 49f > nop This code block is supposed to fallthrough when %g2 is 'M' so that we accept all of "{T,M}345..." but your change is breaking that such that we will now only accept "M" as a prefix for "7". That's a regression. All you have to do is add the new comparison against '7' in the "70:" label code block, and you're done. -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> > I don't think this is correct. > >> @@ -414,6 +414,8 @@ sun4v_chip_type: >> cmp %g2, 'T' >> be,pt %xcc, 70f >> cmp %g2, 'M' >> + be,pt %xcc, 71f >> + nop >> bne,pn %xcc, 49f >> nop > > This code block is supposed to fallthrough when %g2 is 'M' so that > we accept all of "{T,M}345..." but your change is breaking that > such that we will now only accept "M" as a prefix for "7". > > That's a regression. > > All you have to do is add the new comparison against '7' in the > "70:" label code block, and you're done. The idea was to also have M5 and M6-32 cpu types supported too with M7. +71: + ldub [%g1 + 7], %g2 + cmp %g1, '5' + be,pt %xcc, 5f + mov SUN4V_CHIP_SPARC_M5, %g4 + cmp %g1, '6' + be,pt %xcc, 5f + mov SUN4V_CHIP_SPARC_M6, %g4 + cmp %g2, '7' + be,pt %xcc, 5f + mov SUN4V_CHIP_SPARC_M7, %g4 + ba,pt %xcc, 49f + nop + I haven't tested it yet on M5, I should have perhaps sent all them together. lemme know what you think. - Allen -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
From: Allen Pais <allen.pais@oracle.com> Date: Sun, 24 Aug 2014 11:37:09 +0530 >> >> I don't think this is correct. >> >>> @@ -414,6 +414,8 @@ sun4v_chip_type: >>> cmp %g2, 'T' >>> be,pt %xcc, 70f >>> cmp %g2, 'M' >>> + be,pt %xcc, 71f >>> + nop >>> bne,pn %xcc, 49f >>> nop >> >> This code block is supposed to fallthrough when %g2 is 'M' so that >> we accept all of "{T,M}345..." but your change is breaking that >> such that we will now only accept "M" as a prefix for "7". >> >> That's a regression. >> >> All you have to do is add the new comparison against '7' in the >> "70:" label code block, and you're done. > > The idea was to also have M5 and M6-32 cpu types supported too with M7. > > +71: > + ldub [%g1 + 7], %g2 > + cmp %g1, '5' > + be,pt %xcc, 5f > + mov SUN4V_CHIP_SPARC_M5, %g4 > + cmp %g1, '6' > + be,pt %xcc, 5f > + mov SUN4V_CHIP_SPARC_M6, %g4 > + cmp %g2, '7' > + be,pt %xcc, 5f > + mov SUN4V_CHIP_SPARC_M7, %g4 > + ba,pt %xcc, 49f > + nop > + Again, why are you bothing with a special code path at all? You don't need to. Just add the M7 test to the "70:" label code block, and you're done. -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
David, >> The idea was to also have M5 and M6-32 cpu types supported too with M7. >> >> +71: >> + ldub [%g1 + 7], %g2 >> + cmp %g1, '5' >> + be,pt %xcc, 5f >> + mov SUN4V_CHIP_SPARC_M5, %g4 >> + cmp %g1, '6' >> + be,pt %xcc, 5f >> + mov SUN4V_CHIP_SPARC_M6, %g4 >> + cmp %g2, '7' >> + be,pt %xcc, 5f >> + mov SUN4V_CHIP_SPARC_M7, %g4 >> + ba,pt %xcc, 49f >> + nop >> + > > Again, why are you bothing with a special code path at all? You don't > need to. > > Just add the M7 test to the "70:" label code block, and you're done. > I was a little confused when you initially mentioned about using "70:" label code block, now I see the point. I'll re-do the patch and test it. - Allen -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/sparc/include/asm/spitfire.h b/arch/sparc/include/asm/spitfire.h index 3fc58691..9aec17b 100644 --- a/arch/sparc/include/asm/spitfire.h +++ b/arch/sparc/include/asm/spitfire.h @@ -45,6 +45,7 @@ #define SUN4V_CHIP_NIAGARA3 0x03 #define SUN4V_CHIP_NIAGARA4 0x04 #define SUN4V_CHIP_NIAGARA5 0x05 +#define SUN4V_CHIP_SPARC_M7 0x08 #define SUN4V_CHIP_SPARC64X 0x8a #define SUN4V_CHIP_UNKNOWN 0xff diff --git a/arch/sparc/kernel/cpu.c b/arch/sparc/kernel/cpu.c index 82a3a71..55dfb62 100644 --- a/arch/sparc/kernel/cpu.c +++ b/arch/sparc/kernel/cpu.c @@ -494,6 +494,12 @@ static void __init sun4v_cpu_probe(void) sparc_pmu_type = "niagara5"; break; + case SUN4V_CHIP_SPARC_M7: + sparc_cpu_type = "SPARC-M7"; + sparc_fpu_type = "SPARC-M7 integrated FPU"; + sparc_pmu_type = "sparc-m7"; + break; + case SUN4V_CHIP_SPARC64X: sparc_cpu_type = "SPARC64-X"; sparc_fpu_type = "SPARC64-X integrated FPU"; diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S index 452f04f..577abba0 100644 --- a/arch/sparc/kernel/head_64.S +++ b/arch/sparc/kernel/head_64.S @@ -414,6 +414,8 @@ sun4v_chip_type: cmp %g2, 'T' be,pt %xcc, 70f cmp %g2, 'M' + be,pt %xcc, 71f + nop bne,pn %xcc, 49f nop @@ -430,6 +432,14 @@ sun4v_chip_type: ba,pt %xcc, 49f nop +71: + ldub [%g1 + 7], %g2 + cmp %g2, '7' + be,pt %xcc, 5f + mov SUN4V_CHIP_SPARC_M7, %g4 + ba,pt %xcc, 49f + nop + 91: sethi %hi(prom_cpu_compatible), %g1 or %g1, %lo(prom_cpu_compatible), %g1 ldub [%g1 + 17], %g2 @@ -586,6 +596,10 @@ niagara_tlb_fixup: be,pt %xcc, niagara4_patch nop + cmp %g1, SUN4V_CHIP_SPARC_M7 + be,pt %xcc, niagara4_patch + nop + call generic_patch_copyops nop call generic_patch_bzero
The following patch adds support for correctly recognising M7 cpu type. Signed-off-by: Allen Pais <allen.pais@oracle.com> --- arch/sparc/include/asm/spitfire.h | 1 + arch/sparc/kernel/cpu.c | 6 ++++++ arch/sparc/kernel/head_64.S | 14 ++++++++++++++ 3 files changed, 21 insertions(+)